OpenWrt – Rev 1

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--- a/arch/arm/configs/ixp4xx_defconfig
+++ b/arch/arm/configs/ixp4xx_defconfig
@@ -13,6 +13,7 @@ CONFIG_MACH_AVILA=y
 CONFIG_MACH_LOFT=y
 CONFIG_ARCH_ADI_COYOTE=y
 CONFIG_MACH_GATEWAY7001=y
+CONFIG_MACH_WG302V1=y
 CONFIG_MACH_WG302V2=y
 CONFIG_ARCH_IXDP425=y
 CONFIG_MACH_IXDPG425=y
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -45,6 +45,14 @@ config MACH_GATEWAY7001
          7001 Access Point. For more information on this platform,
          see http://openwrt.org
 
+config MACH_WG302V1
+       bool "Netgear WG302 v1 / WAG302 v1"
+       select PCI
+       help
+         Say 'Y' here if you want your kernel to support Netgear's
+         WG302 v1 or WAG302 v1 Access Points. For more information
+         on this platform, see http://openwrt.org
+
 config MACH_WG302V2
        bool "Netgear WG302 v2 / WAG302 v2"
        select PCI
--- a/arch/arm/mach-ixp4xx/Makefile
+++ b/arch/arm/mach-ixp4xx/Makefile
@@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NSLU2)          += nslu2-p
 obj-pci-$(CONFIG_MACH_NAS100D)         += nas100d-pci.o
 obj-pci-$(CONFIG_MACH_DSMG600)         += dsmg600-pci.o
 obj-pci-$(CONFIG_MACH_GATEWAY7001)     += gateway7001-pci.o
+obj-pci-$(CONFIG_MACH_WG302V1)         += wg302v1-pci.o
 obj-pci-$(CONFIG_MACH_WG302V2)         += wg302v2-pci.o
 obj-pci-$(CONFIG_MACH_FSG)             += fsg-pci.o
 obj-pci-$(CONFIG_MACH_ARCOM_VULCAN)    += vulcan-pci.o
@@ -33,6 +34,7 @@ obj-$(CONFIG_MACH_NSLU2)      += nslu2-setup.
 obj-$(CONFIG_MACH_NAS100D)     += nas100d-setup.o
 obj-$(CONFIG_MACH_DSMG600)      += dsmg600-setup.o
 obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
+obj-$(CONFIG_MACH_WG302V1)     += wg302v1-setup.o
 obj-$(CONFIG_MACH_WG302V2)     += wg302v2-setup.o
 obj-$(CONFIG_MACH_FSG)         += fsg-setup.o
 obj-$(CONFIG_MACH_GORAMO_MLR)  += goramo_mlr.o
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/wg302v1-pci.c
@@ -0,0 +1,63 @@
+/*
+ * arch/arch/mach-ixp4xx/wg302v1-pci.c
+ *
+ * PCI setup routines for the Netgear WG302 v1 and WAG302 v1
+ *
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * based on coyote-pci.c:
+ *     Copyright (C) 2002 Jungo Software Technologies.
+ *     Copyright (C) 2003 MontaVista Software, Inc.
+ *
+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/mach-types.h>
+#include <mach/hardware.h>
+
+#include <asm/mach/pci.h>
+
+void __init wg302v1_pci_preinit(void)
+{
+       irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
+       irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
+
+       ixp4xx_pci_preinit();
+}
+
+static int __init wg302v1_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+       if (slot == 1)
+               return IRQ_IXP4XX_GPIO8;
+       else if (slot == 2)
+               return IRQ_IXP4XX_GPIO10;
+       else
+               return -1;
+}
+
+struct hw_pci wg302v1_pci __initdata = {
+       .nr_controllers = 1,
+       .preinit =        wg302v1_pci_preinit,
+       .ops =            &ixp4xx_ops,
+       .setup =          ixp4xx_setup,
+       .map_irq =        wg302v1_map_irq,
+};
+
+int __init wg302v1_pci_init(void)
+{
+       if (machine_is_wg302v1())
+               pci_common_init(&wg302v1_pci);
+       return 0;
+}
+
+subsys_initcall(wg302v1_pci_init);
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
@@ -0,0 +1,147 @@
+/*
+ * arch/arm/mach-ixp4xx/wg302v1-setup.c
+ *
+ * Board setup for the Netgear WG302 v1 and WAG302 v1
+ *
+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+ *
+ * based on coyote-setup.c:
+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
+ *
+ * Author: Imre Kaloz <kaloz@openwrt.org>
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/serial.h>
+#include <linux/tty.h>
+#include <linux/serial_8250.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/memory.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/setup.h>
+#include <mach/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+
+static struct flash_platform_data wg302v1_flash_data = {
+       .map_name       = "cfi_probe",
+       .width          = 2,
+};
+
+static struct resource wg302v1_flash_resource = {
+       .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device wg302v1_flash = {
+       .name           = "IXP4XX-Flash",
+       .id             = 0,
+       .dev            = {
+               .platform_data = &wg302v1_flash_data,
+       },
+       .num_resources  = 1,
+       .resource       = &wg302v1_flash_resource,
+};
+
+static struct resource wg302v1_uart_resources[] = {
+       {
+               .start  = IXP4XX_UART1_BASE_PHYS,
+               .end    = IXP4XX_UART1_BASE_PHYS + 0x0fff,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .start  = IXP4XX_UART2_BASE_PHYS,
+               .end    = IXP4XX_UART2_BASE_PHYS + 0x0fff,
+               .flags  = IORESOURCE_MEM,
+       }
+};
+
+static struct plat_serial8250_port wg302v1_uart_data[] = {
+       {
+               .mapbase        = IXP4XX_UART1_BASE_PHYS,
+               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
+               .irq            = IRQ_IXP4XX_UART1,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+               .iotype         = UPIO_MEM,
+               .regshift       = 2,
+               .uartclk        = IXP4XX_UART_XTAL,
+       },
+       {
+               .mapbase        = IXP4XX_UART2_BASE_PHYS,
+               .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
+               .irq            = IRQ_IXP4XX_UART2,
+               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+               .iotype         = UPIO_MEM,
+               .regshift       = 2,
+               .uartclk        = IXP4XX_UART_XTAL,
+       },
+       { },
+};
+
+static struct platform_device wg302v1_uart = {
+       .name           = "serial8250",
+       .id             = PLAT8250_DEV_PLATFORM,
+       .dev                    = {
+               .platform_data  = wg302v1_uart_data,
+       },
+       .num_resources  = 2,
+       .resource       = wg302v1_uart_resources,
+};
+
+static struct eth_plat_info wg302v1_plat_eth[] = {
+       {
+               .phy            = 30,
+               .rxq            = 3,
+               .txreadyq       = 20,
+       }
+};
+
+static struct platform_device wg302v1_eth[] = {
+       {
+               .name                   = "ixp4xx_eth",
+               .id                     = IXP4XX_ETH_NPEB,
+               .dev.platform_data      = wg302v1_plat_eth,
+               .dev.coherent_dma_mask  = DMA_BIT_MASK(32),
+       }
+};
+
+static struct platform_device *wg302v1_devices[] __initdata = {
+       &wg302v1_flash,
+       &wg302v1_uart,
+       &wg302v1_eth[0],
+};
+
+static void __init wg302v1_init(void)
+{
+       ixp4xx_sys_init();
+
+       wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
+       wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
+
+       *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
+       *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
+
+       platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices));
+}
+
+#ifdef CONFIG_MACH_WG302V1
+MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1")
+       /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
+       .fixup          = wg302v1_fixup,
+       .map_io         = ixp4xx_map_io,
+       .init_irq       = ixp4xx_init_irq,
+       .init_time      = ixp4xx_timer_init,
+       .atag_offset    = 0x0100,
+       .init_machine   = wg302v1_init,
+#if defined(CONFIG_PCI)
+       .dma_zone_size  = SZ_64M,
+#endif
+       .restart        = ixp4xx_restart,
+MACHINE_END
+#endif

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