OpenWrt – Rev 4

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From adf4e289dd7f801c3fe12e0e6b491e11e548cd3d Mon Sep 17 00:00:00 2001
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
Date: Thu, 30 Nov 2017 14:40:27 +0100
Subject: clk: mvebu: armada-37xx-periph: cosmetic changes

This patches fixes few cosmetic issues such as alignment, blank lines
and required space.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 drivers/clk/mvebu/armada-37xx-periph.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -79,6 +79,7 @@ static const struct clk_div_table clk_ta
        { .val = 1, .div = 4, },
        { .val = 0, .div = 0, }, /* last entry */
 };
+
 static const struct clk_ops clk_double_div_ops;
 
 #define PERIPH_GATE(_name, _bit)               \
@@ -217,7 +218,7 @@ PERIPH_CLK_FULL(counter, 23, 20, DIV_SEL
 PERIPH_CLK_FULL_DD(eip97, 24, 24, DIV_SEL2, DIV_SEL2, 22, 19);
 PERIPH_CLK_MUX_DIV(cpu, 22, DIV_SEL0, 28, clk_table6);
 
-static struct clk_periph_data data_nb[] ={
+static struct clk_periph_data data_nb[] = {
        REF_CLK_FULL_DD(mmc),
        REF_CLK_FULL_DD(sata_host),
        REF_CLK_FULL_DD(sec_at),
@@ -281,7 +282,7 @@ static unsigned int get_div(void __iomem
 }
 
 static unsigned long clk_double_div_recalc_rate(struct clk_hw *hw,
-               unsigned long parent_rate)
+                                               unsigned long parent_rate)
 {
        struct clk_double_div *double_div = to_clk_double_div(hw);
        unsigned int div;
@@ -303,6 +304,7 @@ static const struct of_device_id armada_
        .data = data_sb, },
        { }
 };
+
 static int armada_3700_add_composite_clk(const struct clk_periph_data *data,
                                         void __iomem *reg, spinlock_t *lock,
                                         struct device *dev, struct clk_hw **hw)
@@ -355,9 +357,9 @@ static int armada_3700_add_composite_clk
        }
 
        *hw = clk_hw_register_composite(dev, data->name, data->parent_names,
-                                      data->num_parents, mux_hw,
-                                      mux_ops, rate_hw, rate_ops,
-                                      gate_hw, gate_ops, CLK_IGNORE_UNUSED);
+                                       data->num_parents, mux_hw,
+                                       mux_ops, rate_hw, rate_ops,
+                                       gate_hw, gate_ops, CLK_IGNORE_UNUSED);
 
        if (IS_ERR(*hw))
                return PTR_ERR(*hw);
@@ -406,12 +408,11 @@ static int armada_3700_periph_clock_prob
                if (armada_3700_add_composite_clk(&data[i], reg,
                                                  &driver_data->lock, dev, hw))
                        dev_err(dev, "Can't register periph clock %s\n",
-                              data[i].name);
-
+                               data[i].name);
        }
 
        ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
-                                 driver_data->hw_data);
+                                    driver_data->hw_data);
        if (ret) {
                for (i = 0; i < num_periph; i++)
                        clk_hw_unregister(driver_data->hw_data->hws[i]);