OpenWrt – Rev 4

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--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -196,7 +196,6 @@ config ATH79
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_MIPS16
        select SYS_SUPPORTS_ZBOOT_UART_PROM
-       select USE_OF
        help
          Support for the Atheros AR71XX/AR724X/AR913X SoCs.
 
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -196,16 +196,20 @@ unsigned int get_c0_compare_int(void)
 
 void __init plat_mem_setup(void)
 {
+#ifdef CONFIG_OF
        unsigned long fdt_start;
+#endif
 
        set_io_port_base(KSEG1);
 
+#ifdef CONFIG_OF
        /* Get the position of the FDT passed by the bootloader */
        fdt_start = fw_getenvl("fdt_start");
        if (fdt_start)
                __dt_setup_arch((void *)KSEG0ADDR(fdt_start));
        else if (fw_passed_dtb)
                __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
+#endif
 
        if (mips_machtype != ATH79_MACH_GENERIC_OF) {
                ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
@@ -301,17 +305,21 @@ static int __init ath79_setup(void)
 
 arch_initcall(ath79_setup);
 
+#ifdef CONFIG_OF
 void __init device_tree_init(void)
 {
        unflatten_and_copy_device_tree();
 }
+#endif
 
 MIPS_MACHINE(ATH79_MACH_GENERIC,
             "Generic",
             "Generic AR71XX/AR724X/AR913X based board",
             NULL);
 
+#ifdef CONFIG_OF
 MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
             "DTB",
             "Generic AR71XX/AR724X/AR913X based board (DT)",
             NULL);
+#endif
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -33,10 +33,12 @@
 #define AR724X_BASE_FREQ       40000000
 
 static struct clk *clks[ATH79_CLK_END];
+#ifdef CONFIG_OF
 static struct clk_onecell_data clk_data = {
        .clks = clks,
        .clk_num = ARRAY_SIZE(clks),
 };
+#endif
 
 static struct clk *__init ath79_add_sys_clkdev(
        const char *id, unsigned long rate)