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#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
        compatible = "ubiquiti,edgerouterx", "mediatek,mt7621-soc";

        memory@0 {
                device_type = "memory";
                reg = <0x0 0x10000000>;
        };

        chosen {
                bootargs = "console=ttyS0,57600";
        };

        keys {
                compatible = "gpio-keys-polled";
                poll-interval = <20>;

                reset {
                        label = "reset";
                        gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_RESTART>;
                };
        };
};

&ethernet {
        mtd-mac-address = <&factory 0x22>;
};

&nand {
        status = "okay";

        partitions {
                compatible = "fixed-partitions";
                #address-cells = <1>;
                #size-cells = <1>;

                partition@0 {
                        label = "u-boot";
                        reg = <0x0 0x80000>;
                        read-only;
                };

                partition@80000 {
                        label = "u-boot-env";
                        reg = <0x80000 0x60000>;
                        read-only;
                };

                factory: partition@e0000 {
                        label = "factory";
                        reg = <0xe0000 0x60000>;
                };

                partition@140000 {
                        label = "kernel1";
                        reg = <0x140000 0x300000>;
                };

                partition@440000 {
                        label = "kernel2";
                        reg = <0x440000 0x300000>;
                };

                partition@740000 {
                        label = "ubi";
                        reg = <0x740000 0xf7c0000>;
                };
        };
};

&pinctrl {
        state_default: pinctrl0 {
                gpio {
                        ralink,group = "uart2", "uart3", "i2c", "pcie", "rgmii2", "jtag";
                        ralink,function = "gpio";
                };
        };
};

&spi0 {
        /*
         * This board has 2Mb spi flash soldered in and visible
         * from manufacturer's firmware.
         * But this SoC shares spi and nand pins,
         * and current driver doesn't handle this sharing well
         */
        status = "disabled";

        m25p80@1 {
                compatible = "jedec,spi-nor";
                reg = <1>;
                spi-max-frequency = <10000000>;

                partitions {
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
                        #size-cells = <1>;

                        partition@0 {
                                label = "spi";
                                reg = <0x0 0x200000>;
                                read-only;
                        };
                };
        };
};

&xhci {
        status = "disabled";
};