OpenWrt – Rev 4
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From 6a5932028a4f3217ed7c9d602f269611d95dd8ca Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Wed, 9 Aug 2017 15:13:19 +0200
Subject: [PATCH 44/57] net-next: dsa: mediatek: tell GDMA when we are turning
on the special tag
Enabling this bit will make the RX DMA descriptor enable the SP bit for all
ingress traffic inside the return descriptor. The PPE needs this to know
that a SP is present.
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/net/dsa/mt7530.c | 5 +++++
drivers/net/dsa/mt7530.h | 4 ++++
2 files changed, 9 insertions(+)
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -677,6 +677,11 @@ mt7530_cpu_port_enable(struct mt7530_pri
mt7530_write(priv, MT7530_PVC_P(port),
PORT_SPEC_TAG);
+ /* Enable Mediatek header mode on the GMAC that the cpu port
+ * connects to */
+ regmap_write_bits(priv->ethernet, MTK_GDMA_FWD_CFG(port),
+ GDMA_SPEC_TAG, GDMA_SPEC_TAG);
+
/* Setup the MAC by default for the cpu port */
mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPUP_LINK);
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -22,6 +22,10 @@
#define TRGMII_BASE(x) (0x10000 + (x))
+/* Registers for GDMA configuration access */
+#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
+#define GDMA_SPEC_TAG BIT(24)
+
/* Registers to ethsys access */
#define ETHSYS_CLKCFG0 0x2c
#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11)