OpenWrt – Rev 4

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From 6d5af7093aea4f18e040e73db2ad99aaa0c0f77e Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 19 Nov 2017 11:04:23 +0100
Subject: [PATCH] ARM: dts: Add ethernet to a bunch of platforms

These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.

The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.

This is a modified version of upstream commit
95220046a62c00b5afb1aa7c1971989d427db977,
just dropping the NAS4220B changes.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 arch/arm/boot/dts/gemini-dlink-dns-313.dts | 62 ++++++++++++++++++++++++++++++
 arch/arm/boot/dts/gemini-wbd222.dts        |  7 ++++
 2 files changed, 69 insertions(+)

--- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts
+++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts
@@ -215,6 +215,56 @@
                                                groups = "gpio1dgrp";
                                        };
                                };
+                               pinctrl-gmii {
+                                       mux {
+                                               function = "gmii";
+                                               groups = "gmii_gmac0_grp";
+                                       };
+                                       /*
+                                        * In the vendor Linux tree, these values are set for the C3
+                                        * version of the SL3512 ASIC with the comment "benson suggest"
+                                        */
+                                       conf0 {
+                                               pins = "R8 GMAC0 RXDV", "U11 GMAC1 RXDV";
+                                               skew-delay = <0>;
+                                       };
+                                       conf1 {
+                                               pins = "T8 GMAC0 RXC";
+                                               skew-delay = <10>;
+                                       };
+                                       conf2 {
+                                               pins = "T11 GMAC1 RXC";
+                                               skew-delay = <15>;
+                                       };
+                                       conf3 {
+                                               pins = "P8 GMAC0 TXEN", "V11 GMAC1 TXEN";
+                                               skew-delay = <7>;
+                                       };
+                                       conf4 {
+                                               pins = "V7 GMAC0 TXC", "P10 GMAC1 TXC";
+                                               skew-delay = <10>;
+                                       };
+                                       conf5 {
+                                               /* The data lines all have default skew */
+                                               pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
+                                                      "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
+                                                      "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
+                                                      "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
+                                                      "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
+                                                      "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
+                                               skew-delay = <7>;
+                                       };
+                                       conf6 {
+                                               pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
+                                                      "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
+                                               skew-delay = <5>;
+                                       };
+                                       /* Set up drive strength on GMAC0 to 16 mA */
+                                       conf7 {
+                                               groups = "gmii_gmac0_grp";
+                                               drive-strength = <16>;
+                                       };
+                               };
                        };
                };
 
@@ -235,6 +285,18 @@
                        pinctrl-0 = <&gpio1_default_pins>;
                };
 
+               ethernet@60000000 {
+                       status = "okay";
+
+                       ethernet-port@0 {
+                               phy-mode = "rgmii";
+                               phy-handle = <&phy0>;
+                       };
+                       ethernet-port@1 {
+                               /* Not used in this platform */
+                       };
+               };
+
                ata@63000000 {
                        status = "okay";
                };
--- a/arch/arm/boot/dts/gemini-wbd222.dts
+++ b/arch/arm/boot/dts/gemini-wbd222.dts
@@ -136,6 +136,13 @@
                                                "gpio0bgrp";
                                        };
                                };
+                               pinctrl-gmii {
+                                       /* This platform use both the ethernet ports */
+                                       mux {
+                                               function = "gmii";
+                                               groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
+                                       };
+                               };
                        };
                };