OpenWrt – Rev 4
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From 1612baf8148e9180f28d7afc93df3ec3cd3e5ce0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sat, 3 Mar 2018 14:18:03 +0000
Subject: [PATCH 239/454] overlays: Add 'upstream' overlay
The 'upstream' overlay makes the necessary changes for a downstream
.dtb to be used with an upstream kernel. It is currently made up from
three other overlays - vc4-kms-v3d, dwc2 and upstream-aux-interrupt.
The VPU firmware will soon be made to automatically load this overlay
when an upstream kernel is detected (using the trailer supplied by the
mkknlimg script).
See: https://github.com/raspberrypi/linux/pull/2393
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 10 +-
.../boot/dts/overlays/upstream-overlay.dts | 154 ++++++++++++++++++
3 files changed, 164 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -123,6 +123,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
tinylcd35.dtbo \
uart0.dtbo \
uart1.dtbo \
+ upstream.dtbo \
upstream-aux-interrupt.dtbo \
vc4-fkms-v3d.dtbo \
vc4-kms-v3d.dtbo \
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -1731,9 +1731,17 @@ Params: txd1_pin GPIO pin
rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
+Name: upstream
+Info: Allow usage of downstream .dtb with upstream kernel. Comprises
+ vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
+Load: dtoverlay=upstream
+Params: <None>
+
+
Name: upstream-aux-interrupt
Info: Allow usage of downstream .dtb with upstream kernel by binding AUX
- devices directly to the shared AUX interrupt line.
+ devices directly to the shared AUX interrupt line. One of the parts
+ of the 'upstream' overlay
Load: dtoverlay=upstream-aux-interrupt
Params: <None>
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
@@ -0,0 +1,154 @@
+// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts,
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/bcm2835.h>
+
+/ {
+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
+ fragment@0 {
+ target-path = "/chosen";
+ __dormant__ {
+ bootargs = "cma=256M";
+ };
+ };
+ fragment@1 {
+ target-path = "/chosen";
+ __dormant__ {
+ bootargs = "cma=192M";
+ };
+ };
+ fragment@2 {
+ target-path = "/chosen";
+ __dormant__ {
+ bootargs = "cma=128M";
+ };
+ };
+ fragment@3 {
+ target-path = "/chosen";
+ __overlay__ {
+ bootargs = "cma=96M";
+ };
+ };
+ fragment@4 {
+ target-path = "/chosen";
+ __dormant__ {
+ bootargs = "cma=64M";
+ };
+ };
+ fragment@5 {
+ target = <&i2c2>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+ fragment@6 {
+ target = <&fb>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+ fragment@7 {
+ target = <&pixelvalve0>;
+ __overlay__ {
+ interrupts = <2 13>;
+ status = "okay";
+ };
+ };
+ fragment@8 {
+ target = <&pixelvalve1>;
+ __overlay__ {
+ interrupts = <2 14>;
+ status = "okay";
+ };
+ };
+ fragment@9 {
+ target = <&pixelvalve2>;
+ __overlay__ {
+ interrupts = <2 10>;
+ status = "okay";
+ };
+ };
+ fragment@10 {
+ target = <&hvs>;
+ __overlay__ {
+ interrupts = <2 1>;
+ status = "okay";
+ };
+ };
+ fragment@11 {
+ target = <&hdmi>;
+ __overlay__ {
+ interrupts = <2 8>, <2 9>;
+ status = "okay";
+ };
+ };
+ fragment@12 {
+ target = <&v3d>;
+ __overlay__ {
+ interrupts = <1 10>;
+ status = "okay";
+ };
+ };
+ fragment@13 {
+ target = <&vc4>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+ fragment@14 {
+ target-path = "/soc/dma";
+ __overlay__ {
+ brcm,dma-channel-mask = <0x7f35>;
+ };
+ };
+ fragment@15 {
+ target = <&clocks>;
+ __overlay__ {
+ claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
+ };
+ };
+ fragment@16 {
+ target = <&vec>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+ fragment@17 {
+ target = <&usb>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ dwc2_usb: __overlay__ {
+ compatible = "brcm,bcm2835-usb";
+ reg = <0x7e980000 0x10000>;
+ interrupts = <1 9>;
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <32>;
+ g-rx-fifo-size = <256>;
+ g-tx-fifo-size = <512 512 512 512 512 768>;
+ status = "okay";
+ };
+ };
+ fragment@18 {
+ target = <&uart1>;
+ __overlay__ {
+ interrupt-parent = <&intc>;
+ interrupts = <0x1 0x1d>;
+ };
+ };
+ fragment@19 {
+ target = <&spi1>;
+ __overlay__ {
+ interrupt-parent = <&intc>;
+ interrupts = <0x1 0x1d>;
+ };
+ };
+ fragment@20 {
+ target = <&spi2>;
+ __overlay__ {
+ interrupt-parent = <&intc>;
+ interrupts = <0x1 0x1d>;
+ };
+ };
+};
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