OpenWrt – Rev 4

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--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask
 void ath79_gpio_function_disable(u32 mask);
 void ath79_gpio_function_setup(u32 set, u32 clear);
 void ath79_gpio_output_select(unsigned gpio, u8 val);
+int ath79_gpio_direction_select(unsigned gpio, bool oe);
 void ath79_gpio_init(void);
 
 #endif /* __ATH79_COMMON_H */
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -83,3 +83,19 @@ void __init ath79_gpio_output_select(uns
        /* flush write */
        (void) __raw_readl(base + reg);
 }
+
+int ath79_gpio_direction_select(unsigned gpio, bool oe)
+{
+       void __iomem *base = ath79_gpio_base;
+       bool ieq_1 = (soc_is_ar934x() ||
+                       soc_is_qca953x());
+
+       if ((ieq_1 && oe) || (!ieq_1 && !oe))
+               __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio),
+                               base + AR71XX_GPIO_REG_OE);
+       else
+               __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio),
+                               base + AR71XX_GPIO_REG_OE);
+
+       return 0;
+}

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