OpenWrt – Rev 1
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From bc183b1da77d6e2fbc801327a1811d446d34f54f Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Wed, 31 Oct 2018 22:20:46 +0100
Subject: [PATCH 1/2] dt-bindings: add protection control property
This patch adds the protection control property and
dt-binding definitions for the DesignWare AHB Central
Direct Memory Access Controller.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
include/dt-bindings/dma/dw-dmac.h | 20 +++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletion(-)
create mode 100644 include/dt-bindings/dma/dw-dmac.h
--- /dev/null
+++ b/include/dt-bindings/dma/dw-dmac.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+
+#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
+#define __DT_BINDINGS_DMA_DW_DMAC_H__
+
+#define DW_DMAC_CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
+#define DW_DMAC_CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
+#define DW_DMAC_CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
+#define DW_DMAC_CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
+
+/*
+ * Protection Control bits provide protection against illegal transactions.
+ * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
+ * The AHB HPROT[0] bit is hardwired to 1: Data Access.
+ */
+#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
+#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
+#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
+
+#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */
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