OpenWrt – Rev 4

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--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
@@ -145,6 +145,7 @@ static inline u32 ath79_reset_rr(unsigne
 
 void ath79_device_reset_set(u32 mask);
 void ath79_device_reset_clear(u32 mask);
+u32 ath79_device_reset_get(u32 mask);
 
 void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3);
 void ath79_misc_irq_init(void __iomem *regs, int irq,
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask)
        spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
 }
 EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
+
+u32 ath79_device_reset_get(u32 mask)
+{
+       unsigned long flags;
+       u32 reg;
+       u32 ret;
+
+       if (soc_is_ar71xx())
+               reg = AR71XX_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar724x())
+               reg = AR724X_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar913x())
+               reg = AR913X_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar933x())
+               reg = AR933X_RESET_REG_RESET_MODULE;
+       else if (soc_is_ar934x())
+               reg = AR934X_RESET_REG_RESET_MODULE;
+       else
+               BUG();
+
+       spin_lock_irqsave(&ath79_device_reset_lock, flags);
+       ret = ath79_reset_rr(reg);
+       spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
+       return ret;
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_get);
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