OpenWrt – Diff between revs 2 and 3

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Line 34... Line 34...
34 */ 34 */
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35   35  
36 #ifndef __ARCH_ARM_MACH_BOARD_H 36 #ifndef __ARCH_ARM_MACH_BOARD_H
Line -... Line 37...
-   37 #define __ARCH_ARM_MACH_BOARD_H
-   38  
-   39 #include <generated/autoconf.h>
-   40 #include <linux/pm.h>
-   41 /* --- chhung */
-   42 // #include <mach/mt6575.h>
-   43 // #include <board-custom.h>
-   44 /* end of chhung */
-   45  
-   46 typedef void (*sdio_irq_handler_t)(void*); /* external irq handler */
37 #define __ARCH_ARM_MACH_BOARD_H 47 typedef void (*pm_callback_t)(pm_message_t state, void *data);
38   48  
39 #define MSDC_CD_PIN_EN (1 << 0) /* card detection pin is wired */ 49 #define MSDC_CD_PIN_EN (1 << 0) /* card detection pin is wired */
-   50 #define MSDC_WP_PIN_EN (1 << 1) /* write protection pin is wired */
-   51 #define MSDC_RST_PIN_EN (1 << 2) /* emmc reset pin is wired */
40 #define MSDC_WP_PIN_EN (1 << 1) /* write protection pin is wired */ 52 #define MSDC_SDIO_IRQ (1 << 3) /* use internal sdio irq (bus) */
-   53 #define MSDC_EXT_SDIO_IRQ (1 << 4) /* use external sdio irq */
-   54 #define MSDC_REMOVABLE (1 << 5) /* removable slot */
-   55 #define MSDC_SYS_SUSPEND (1 << 6) /* suspended by system */
-   56 #define MSDC_HIGHSPEED (1 << 7) /* high-speed mode support */
-   57 #define MSDC_UHS1 (1 << 8) /* uhs-1 mode support */
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41 #define MSDC_RST_PIN_EN (1 << 2) /* emmc reset pin is wired */ 58 #define MSDC_DDR (1 << 9) /* ddr mode support */
42 #define MSDC_REMOVABLE (1 << 5) /* removable slot */ 59  
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43   60  
44 #define MSDC_SMPL_RISING (0) 61 #define MSDC_SMPL_RISING (0)
45 #define MSDC_SMPL_FALLING (1) 62 #define MSDC_SMPL_FALLING (1)
46   63  
47 #define MSDC_CMD_PIN (0) 64 #define MSDC_CMD_PIN (0)
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48 #define MSDC_DAT_PIN (1) 65 #define MSDC_DAT_PIN (1)
-   66 #define MSDC_CD_PIN (2)
-   67 #define MSDC_WP_PIN (3)
49 #define MSDC_CD_PIN (2) 68 #define MSDC_RST_PIN (4)
50 #define MSDC_WP_PIN (3) 69  
-   70 enum {
Line -... Line 71...
-   71 MSDC_CLKSRC_48MHZ = 0,
-   72 // MSDC_CLKSRC_26MHZ = 0,
-   73 // MSDC_CLKSRC_197MHZ = 1,
-   74 // MSDC_CLKSRC_208MHZ = 2
-   75 };
-   76  
-   77 struct msdc_hw {
-   78 unsigned char clk_src; /* host clock source */
-   79 unsigned char cmd_edge; /* command latch edge */
-   80 unsigned char data_edge; /* data latch edge */
-   81 unsigned char clk_drv; /* clock pad driving */
51 #define MSDC_RST_PIN (4) 82 unsigned char cmd_drv; /* command pad driving */
52   83 unsigned char dat_drv; /* data pad driving */
-   84 unsigned long flags; /* hardware capability flags */
-   85 unsigned long data_pins; /* data pins */
-   86 unsigned long data_offset; /* data address offset */
-   87  
-   88 /* config gpio pull mode */
-   89 void (*config_gpio_pin)(int type, int pull);
-   90  
-   91 /* external power control for card */
-   92 void (*ext_power_on)(void);
-   93 void (*ext_power_off)(void);
-   94  
-   95 /* external sdio irq operations */
-   96 void (*request_sdio_eirq)(sdio_irq_handler_t sdio_irq_handler, void *data);
-   97 void (*enable_sdio_eirq)(void);
-   98 void (*disable_sdio_eirq)(void);
-   99  
-   100 /* external cd irq operations */
-   101 void (*request_cd_eirq)(sdio_irq_handler_t cd_irq_handler, void *data);
53 struct msdc_hw { 102 void (*enable_cd_eirq)(void);
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54 unsigned char clk_src; /* host clock source */ 103 void (*disable_cd_eirq)(void);
-   104 int (*get_cd_status)(void);
-   105
-   106 /* power management callback for external module */
-   107 void (*register_pm)(pm_callback_t pm_cb, void *data);
-   108 };
-   109  
-   110 extern struct msdc_hw msdc0_hw;
-   111 extern struct msdc_hw msdc1_hw;
-   112 extern struct msdc_hw msdc2_hw;
-   113 extern struct msdc_hw msdc3_hw;
-   114  
-   115 /*GPS driver*/
-   116 #define GPS_FLAG_FORCE_OFF 0x0001
-   117 struct mt3326_gps_hardware {
-   118 int (*ext_power_on)(int);
-   119 int (*ext_power_off)(int);
-   120 };
-   121 extern struct mt3326_gps_hardware mt3326_gps_hw;
-   122  
-   123 /* NAND driver */
-   124 struct mt6575_nand_host_hw {
-   125 unsigned int nfi_bus_width; /* NFI_BUS_WIDTH */
-   126 unsigned int nfi_access_timing; /* NFI_ACCESS_TIMING */
-   127 unsigned int nfi_cs_num; /* NFI_CS_NUM */
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55 unsigned long flags; /* hardware capability flags */ 128 unsigned int nand_sec_size; /* NAND_SECTOR_SIZE */
-   129 unsigned int nand_sec_shift; /* NAND_SECTOR_SHIFT */