OpenWrt – Diff between revs 2 and 3
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| 1 | #include <dt-bindings/interrupt-controller/mips-gic.h> |
1 | #include <dt-bindings/interrupt-controller/mips-gic.h> |
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| 2 | #include <dt-bindings/clock/mt7621-clk.h> |
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| Line 3... | Line 2... | |||
| 3 | |
2 | |
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| 4 | / { |
3 | / { |
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| 5 | #address-cells = <1>; |
4 | #address-cells = <1>; |
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| 6 | #size-cells = <1>; |
5 | #size-cells = <1>; |
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| Line 7... | Line 6... | |||
| 7 | compatible = "mediatek,mt7621-soc"; |
6 | compatible = "mediatek,mt7621-soc"; |
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| 8 | |
- | ||
| 9 | cpus { |
- | ||
| 10 | #address-cells = <1>; |
- | ||
| 11 | #size-cells = <0>; |
7 | |
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| 12 | |
- | ||
| 13 | cpu@0 { |
8 | cpus { |
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| 14 | device_type = "cpu"; |
- | ||
| 15 | compatible = "mips,mips1004Kc"; |
9 | cpu@0 { |
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| Line 16... | Line 10... | |||
| 16 | reg = <0>; |
10 | compatible = "mips,mips1004Kc"; |
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| 17 | }; |
- | ||
| 18 | |
11 | }; |
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| 19 | cpu@1 { |
- | ||
| 20 | device_type = "cpu"; |
12 | |
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| 21 | compatible = "mips,mips1004Kc"; |
13 | cpu@1 { |
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| Line 22... | Line 14... | |||
| 22 | reg = <1>; |
14 | compatible = "mips,mips1004Kc"; |
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| 23 | }; |
15 | }; |
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| 24 | }; |
16 | }; |
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| 25 | |
17 | |
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| 26 | cpuintc: cpuintc { |
18 | cpuintc: cpuintc@0 { |
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| 27 | #address-cells = <0>; |
19 | #address-cells = <0>; |
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| Line 28... | Line 20... | |||
| 28 | #interrupt-cells = <1>; |
20 | #interrupt-cells = <1>; |
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| 29 | interrupt-controller; |
21 | interrupt-controller; |
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| 30 | compatible = "mti,cpu-interrupt-controller"; |
22 | compatible = "mti,cpu-interrupt-controller"; |
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| Line 31... | Line 23... | |||
| 31 | }; |
23 | }; |
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| - | 24 | |
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| 32 | |
25 | aliases { |
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| Line 33... | Line 26... | |||
| 33 | aliases { |
26 | serial0 = &uartlite; |
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| 34 | serial0 = &uartlite; |
27 | }; |
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| 35 | }; |
28 | |
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| Line 36... | Line 29... | |||
| 36 | |
29 | cpuclock: cpuclock@0 { |
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| 37 | pll: pll { |
30 | #clock-cells = <0>; |
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| 38 | compatible = "mediatek,mt7621-pll", "syscon"; |
31 | compatible = "fixed-clock"; |
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| Line 39... | Line 32... | |||
| 39 | |
32 | |
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| 40 | #clock-cells = <1>; |
33 | /* FIXME: there should be way to detect this */ |
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| Line 136... | Line 129... | |||
| 136 | dma-names = "tx", "rx"; |
129 | dma-names = "tx", "rx"; |
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| Line 137... | Line 130... | |||
| 137 | |
130 | |
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| 138 | status = "disabled"; |
131 | status = "disabled"; |
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| Line 139... | Line 132... | |||
| 139 | }; |
132 | }; |
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| 140 | |
133 | |
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| 141 | systick: systick@500 { |
134 | systick: systick@d00 { |
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| Line 142... | Line 135... | |||
| 142 | compatible = "ralink,mt7621-systick", "ralink,cevt-systick"; |
135 | compatible = "ralink,mt7621-systick", "ralink,cevt-systick"; |
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| 143 | reg = <0x500 0x10>; |
136 | reg = <0xd00 0x10>; |
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| Line 144... | Line 137... | |||
| 144 | |
137 | |
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| 145 | resets = <&rstctrl 28>; |
138 | resets = <&rstctrl 28>; |
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| 146 | reset-names = "intc"; |
139 | reset-names = "intc"; |
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| Line 147... | Line 140... | |||
| 147 | |
140 | |
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| 148 | interrupt-parent = <&gic>; |
141 | interrupt-parent = <&gic>; |
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| 149 | interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>; |
142 | interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>; |
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| 150 | }; |
143 | }; |
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| Line 151... | Line 144... | |||
| 151 | |
144 | |
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| 152 | memc: memc@5000 { |
145 | memc: memc@5000 { |
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| 153 | compatible = "mtk,mt7621-memc"; |
146 | compatible = "mtk,mt7621-memc"; |
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| 154 | reg = <0x5000 0x1000>; |
147 | reg = <0x300 0x100>; |
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| Line 155... | Line 148... | |||
| 155 | }; |
148 | }; |
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| 156 | |
149 | |
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| 157 | cpc: cpc@1fbf0000 { |
150 | cpc: cpc@1fbf0000 { |
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| 158 | compatible = "mtk,mt7621-cpc"; |
151 | compatible = "mtk,mt7621-cpc"; |
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| Line 159... | Line 152... | |||
| 159 | reg = <0x1fbf0000 0x8000>; |
152 | reg = <0x1fbf0000 0x8000>; |
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| 160 | }; |
153 | }; |
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| 161 | |
154 | |
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| Line -... | Line 155... | |||
| - | 155 | mc: mc@1fbf8000 { |
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| 162 | mc: mc@1fbf8000 { |
156 | compatible = "mtk,mt7621-mc"; |
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| Line 163... | Line 157... | |||
| 163 | compatible = "mtk,mt7621-mc"; |
157 | reg = <0x1fbf8000 0x8000>; |
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| 164 | reg = <0x1fbf8000 0x8000>; |
158 | }; |
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| Line 165... | Line 159... | |||
| 165 | }; |
159 | |
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| 166 | |
160 | uartlite: uartlite@c00 { |
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| 167 | uartlite: uartlite@c00 { |
161 | compatible = "ns16550a"; |
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| 168 | compatible = "ns16550a"; |
162 | reg = <0xc00 0x100>; |
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| Line 169... | Line -... | |||
| 169 | reg = <0xc00 0x100>; |
- | ||
| 170 | |
- | ||
| 171 | clock-frequency = <50000000>; |
- | ||
| 172 | |
- | ||
| 173 | interrupt-parent = <&gic>; |
- | ||
| 174 | interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; |
- | ||
| 175 | |
- | ||
| 176 | reg-shift = <2>; |
- | ||
| 177 | reg-io-width = <4>; |
- | ||
| 178 | no-loopback-test; |
- | ||
| 179 | }; |
- | ||
| 180 | |
- | ||
| 181 | uartlite2: uartlite2@d00 { |
- | ||
| 182 | compatible = "ns16550a"; |
- | ||
| 183 | reg = <0xd00 0x100>; |
- | ||
| 184 | |
- | ||
| 185 | clock-frequency = <50000000>; |
- | ||
| 186 | |
- | ||
| 187 | interrupt-parent = <&gic>; |
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| 188 | interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>; |
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| 189 | |
- | ||
| 190 | reg-shift = <2>; |
- | ||
| 191 | reg-io-width = <4>; |
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| 192 | |
- | ||
| 193 | pinctrl-names = "default"; |
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| 194 | pinctrl-0 = <&uart2_pins>; |
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| 195 | |
- | ||
| 196 | status = "disabled"; |
- | ||
| 197 | }; |
- | ||
| 198 | |
- | ||
| 199 | uartlite3: uartlite3@e00 { |
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| 200 | compatible = "ns16550a"; |
- | ||
| 201 | reg = <0xe00 0x100>; |
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| 202 | |
- | ||
| 203 | clock-frequency = <50000000>; |
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| 204 | |
- | ||
| 205 | interrupt-parent = <&gic>; |
163 | |
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| 206 | interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>; |
164 | clocks = <&sysclock>; |
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| Line 207... | Line 165... | |||
| 207 | |
165 | clock-frequency = <50000000>; |
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| 208 | reg-shift = <2>; |
166 | |
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| Line 209... | Line 167... | |||
| 209 | reg-io-width = <4>; |
167 | interrupt-parent = <&gic>; |
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| Line 210... | Line 168... | |||
| 210 | |
168 | interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; |
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| 211 | pinctrl-names = "default"; |
169 | |
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| Line 212... | Line 170... | |||
| 212 | pinctrl-0 = <&uart3_pins>; |
170 | reg-shift = <2>; |
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| Line 273... | Line 231... | |||
| 273 | pinctrl-0 = <&state_default>; |
231 | pinctrl-0 = <&state_default>; |
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| Line 274... | Line 232... | |||
| 274 | |
232 | |
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| 275 | state_default: pinctrl0 { |
233 | state_default: pinctrl0 { |
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| Line 276... | Line 234... | |||
| 276 | }; |
234 | }; |
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| 277 | |
235 | |
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| 278 | i2c_pins: i2c_pins { |
236 | i2c_pins: i2c { |
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| 279 | i2c_pins { |
237 | i2c { |
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| 280 | ralink,group = "i2c"; |
238 | ralink,group = "i2c"; |
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| 281 | ralink,function = "i2c"; |
239 | ralink,function = "i2c"; |
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| Line 282... | Line 240... | |||
| 282 | }; |
240 | }; |
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| 283 | }; |
241 | }; |
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| 284 | |
242 | |
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| 285 | spi_pins: spi_pins { |
243 | spi_pins: spi { |
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| 286 | spi_pins { |
244 | spi { |
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| 287 | ralink,group = "spi"; |
245 | ralink,group = "spi"; |
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| Line 374... | Line 332... | |||
| 374 | compatible = "ralink,mt7620-sdhci"; |
332 | compatible = "ralink,mt7620-sdhci"; |
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| 375 | reg = <0x1E130000 0x4000>; |
333 | reg = <0x1E130000 0x4000>; |
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| Line 376... | Line 334... | |||
| 376 | |
334 | |
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| 377 | interrupt-parent = <&gic>; |
335 | interrupt-parent = <&gic>; |
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| 378 | interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>; |
- | ||
| 379 | |
- | ||
| 380 | pinctrl-names = "default"; |
- | ||
| 381 | pinctrl-0 = <&sdhci_pins>; |
336 | interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>; |
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| Line 382... | Line 337... | |||
| 382 | }; |
337 | }; |
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| 383 | |
- | ||
| 384 | xhci: xhci@1E1C0000 { |
- | ||
| 385 | #address-cells = <1>; |
338 | |
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| Line 386... | Line 339... | |||
| 386 | #size-cells = <0>; |
339 | xhci: xhci@1E1C0000 { |
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| 387 | status = "okay"; |
340 | status = "okay"; |
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| 388 | |
341 | |
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| Line 394... | Line 347... | |||
| 394 | clocks = <&sysclock>; |
347 | clocks = <&sysclock>; |
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| 395 | clock-names = "sys_ck"; |
348 | clock-names = "sys_ck"; |
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| Line 396... | Line 349... | |||
| 396 | |
349 | |
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| 397 | interrupt-parent = <&gic>; |
350 | interrupt-parent = <&gic>; |
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| 398 | interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>; |
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| 399 | |
- | ||
| 400 | /* |
- | ||
| 401 | * Port 1 of both hubs is one usb slot and referenced here. |
- | ||
| 402 | * The binding doesn't allow to address individual hubs. |
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| 403 | * hub 1 - port 1 is ehci and ohci, hub 2 - port 1 is xhci. |
- | ||
| 404 | */ |
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| 405 | xhci_ehci_port1: port@1 { |
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| 406 | reg = <1>; |
- | ||
| 407 | #trigger-source-cells = <0>; |
- | ||
| 408 | }; |
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| 409 | |
- | ||
| 410 | /* |
- | ||
| 411 | * Only the second usb hub has a second port. That port serves |
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| 412 | * ehci and ohci. |
- | ||
| 413 | */ |
- | ||
| 414 | ehci_port2: port@2 { |
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| 415 | reg = <2>; |
- | ||
| 416 | #trigger-source-cells = <0>; |
- | ||
| 417 | }; |
351 | interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>; |
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| Line 418... | Line 352... | |||
| 418 | }; |
352 | }; |
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| 419 | |
353 | |
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| 420 | gic: interrupt-controller@1fbc0000 { |
354 | gic: interrupt-controller@1fbc0000 { |
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| Line 427... | Line 361... | |||
| 427 | mti,reserved-cpu-vectors = <7>; |
361 | mti,reserved-cpu-vectors = <7>; |
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| Line 428... | Line 362... | |||
| 428 | |
362 | |
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| 429 | timer { |
363 | timer { |
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| 430 | compatible = "mti,gic-timer"; |
364 | compatible = "mti,gic-timer"; |
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| 431 | interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; |
365 | interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; |
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| 432 | clocks = <&pll MT7621_CLK_CPU>; |
366 | clocks = <&cpuclock>; |
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| 433 | }; |
367 | }; |
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| Line 434... | Line 368... | |||
| 434 | }; |
368 | }; |
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| 435 | |
369 | |
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| Line 436... | Line 370... | |||
| 436 | nand: nand@1e003000 { |
370 | nand: nand@1e003000 { |
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| 437 | status = "disabled"; |
371 | status = "disabled"; |
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| 438 | |
372 | |
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| 439 | compatible = "mtk,mt7621-nand"; |
373 | compatible = "mtk,mt7621-nand"; |
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| - | 374 | bank-width = <2>; |
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| - | 375 | reg = <0x1e003000 0x800 |
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| - | 376 | 0x1e003800 0x800>; |
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| - | 377 | #address-cells = <1>; |
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| - | 378 | #size-cells = <1>; |
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| - | 379 | }; |
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| - | 380 | |
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| - | 381 | hnat: hnat@1e100000 { |
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| - | 382 | compatible = "mediatek,mt7623-hnat"; |
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| - | 383 | reg = <0x1e100000 0x10000>; |
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| - | 384 | mtketh-ppd = "eth0"; |
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| - | 385 | mtketh-lan = "eth0"; |
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| 440 | bank-width = <2>; |
386 | mtketh-wan = "eth0"; |
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| Line 441... | Line 387... | |||
| 441 | reg = <0x1e003000 0x800 |
387 | resets = <&rstctrl 0>; |
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| 442 | 0x1e003800 0x800>; |
388 | reset-names = "mtketh"; |
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| 443 | }; |
389 | }; |
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| Line 444... | Line 390... | |||
| 444 | |
390 | |
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| 445 | ethernet: ethernet@1e100000 { |
391 | ethernet: ethernet@1e100000 { |
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| Line 446... | Line 392... | |||
| 446 | compatible = "mediatek,mt7621-eth"; |
392 | compatible = "mediatek,mt7621-eth"; |
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| 447 | reg = <0x1e100000 0x10000>; |
393 | reg = <0x1e100000 0x10000>; |
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| Line 448... | Line 394... | |||
| 448 | |
394 | |
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| Line 464... | Line 410... | |||
| 464 | phy1f: ethernet-phy@1f { |
410 | phy1f: ethernet-phy@1f { |
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| 465 | reg = <0x1f>; |
411 | reg = <0x1f>; |
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| 466 | phy-mode = "rgmii"; |
412 | phy-mode = "rgmii"; |
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| 467 | }; |
413 | }; |
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| 468 | }; |
414 | }; |
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| 469 | |
- | ||
| 470 | hnat: hnat@0 { |
- | ||
| 471 | compatible = "mediatek,mt7623-hnat"; |
- | ||
| 472 | reg = <0 0x10000>; |
- | ||
| 473 | mtketh-ppd = "eth0"; |
- | ||
| 474 | mtketh-lan = "eth0"; |
- | ||
| 475 | mtketh-wan = "eth0"; |
- | ||
| 476 | resets = <&rstctrl 0>; |
- | ||
| 477 | reset-names = "mtketh"; |
- | ||
| 478 | }; |
- | ||
| 479 | }; |
415 | }; |
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| Line 480... | Line 416... | |||
| 480 | |
416 | |
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| 481 | gsw: gsw@1e110000 { |
417 | gsw: gsw@1e110000 { |
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| 482 | compatible = "mediatek,mt7621-gsw"; |
418 | compatible = "mediatek,mt7621-gsw"; |
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| Line 514... | Line 450... | |||
| 514 | resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>; |
450 | resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>; |
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| 515 | reset-names = "pcie0", "pcie1", "pcie2"; |
451 | reset-names = "pcie0", "pcie1", "pcie2"; |
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| 516 | clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>; |
452 | clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>; |
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| 517 | clock-names = "pcie0", "pcie1", "pcie2"; |
453 | clock-names = "pcie0", "pcie1", "pcie2"; |
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| Line 518... | Line 454... | |||
| 518 | |
454 | |
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| 519 | pcie0: pcie@0,0 { |
455 | pcie0 { |
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| Line 520... | Line 456... | |||
| 520 | reg = <0x0000 0 0 0 0>; |
456 | reg = <0x0000 0 0 0 0>; |
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| 521 | |
457 | |
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| Line 522... | Line 458... | |||
| 522 | #address-cells = <3>; |
458 | #address-cells = <3>; |
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| 523 | #size-cells = <2>; |
459 | #size-cells = <2>; |
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| Line 524... | Line 460... | |||
| 524 | |
460 | |
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| 525 | ranges; |
461 | device_type = "pci"; |
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| Line 526... | Line 462... | |||
| 526 | }; |
462 | }; |
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| 527 | |
463 | |
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| Line 528... | Line 464... | |||
| 528 | pcie1: pcie@1,0 { |
464 | pcie1 { |
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| 529 | reg = <0x0800 0 0 0 0>; |
465 | reg = <0x0800 0 0 0 0>; |
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| Line 530... | Line 466... | |||
| 530 | |
466 | |
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| 531 | #address-cells = <3>; |
467 | #address-cells = <3>; |
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| Line 532... | Line 468... | |||
| 532 | #size-cells = <2>; |
468 | #size-cells = <2>; |
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| 533 | |
469 | |
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| Line 534... | Line 470... | |||
| 534 | ranges; |
470 | device_type = "pci"; |
|
| 535 | }; |
471 | }; |
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| 536 | |
472 | |
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| 537 | pcie2: pcie@2,0 { |
473 | pcie2 { |
|