OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 7... Line 7...
7   7  
8 / { 8 / {
9 compatible = "youhua,wr1200js", "mediatek,mt7621-soc"; 9 compatible = "youhua,wr1200js", "mediatek,mt7621-soc";
Line 10... Line -...
10 model = "YouHua WR1200JS"; -  
11   -  
12 aliases { -  
13 led-boot = &led_wps; -  
14 led-failsafe = &led_wps; -  
15 }; 10 model = "YouHua WR1200JS";
16   11  
17 memory@0 { 12 memory@0 {
18 device_type = "memory"; 13 device_type = "memory";
Line 19... Line 14...
19 reg = <0x0 0x8000000>; 14 reg = <0x0 0x8000000>;
20 }; 15 };
21   16  
Line 22... Line 17...
22 chosen { 17 chosen {
23 bootargs = "console=ttyS0,115200"; 18 bootargs = "console=ttyS0,115200";
Line 24... Line 19...
24 }; 19 };
25   20  
26 leds { 21 gpio-leds {
27 compatible = "gpio-leds"; 22 compatible = "gpio-leds";
Line 28... Line 23...
28   23  
29 internet { 24 internet {
30 label = "wr1200js:blue:internet"; 25 label = "wr1200js:blue:internet";
31 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 26 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Line 32... Line 27...
32 }; 27 };
33   28  
34 led_wps: wps { 29 wps {
35 label = "wr1200js:blue:wps"; -  
36 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; -  
37 }; 30 label = "wr1200js:blue:wps";
38   31 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
Line 39... Line 32...
39 usb { 32 };
40 label = "wr1200js:blue:usb"; 33  
-   34 usb {
-   35 label = "wr1200js:blue:usb";
41 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; 36 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
Line 42... Line 37...
42 trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>; 37 };
43 linux,default-trigger = "usbport"; 38 };
44 }; 39  
Line 70... Line 65...
70   65  
71 &spi0 { 66 &spi0 {
Line 72... Line 67...
72 status = "okay"; 67 status = "okay";
-   68  
-   69 m25p80@0 {
73   70 #address-cells = <1>;
74 m25p80@0 { 71 #size-cells = <1>;
75 compatible = "jedec,spi-nor"; 72 compatible = "jedec,spi-nor";
-   73 reg = <0>;
Line 76... Line -...
76 reg = <0>; -  
77 spi-max-frequency = <10000000>; -  
78   -  
79 partitions { -  
80 compatible = "fixed-partitions"; -  
81 #address-cells = <1>; 74 spi-max-frequency = <10000000>;
82 #size-cells = <1>; 75 m25p,chunked-io = <32>;
83   76  
84 partition@0 { 77 partition@0 {
85 label = "u-boot"; 78 label = "u-boot";
Line 86... Line 79...
86 reg = <0x0 0x30000>; 79 reg = <0x0 0x30000>;
87 read-only; 80 read-only;
88 }; 81 };
89   82  
90 partition@30000 { 83 partition@30000 {
Line 91... Line 84...
91 label = "u-boot-env"; 84 label = "u-boot-env";
92 reg = <0x30000 0x10000>; 85 reg = <0x30000 0x10000>;
93 read-only; 86 read-only;
94 }; 87 };
95   88  
Line 96... Line 89...
96 factory: partition@40000 { 89 factory: partition@40000 {
97 label = "factory"; -  
98 reg = <0x40000 0x10000>; 90 label = "factory";
99 read-only; 91 reg = <0x40000 0x10000>;
100 }; -  
101   92 read-only;
102 partition@50000 { 93 };
103 compatible = "denx,uimage"; 94  
Line 104... Line 95...
104 label = "firmware"; 95 partition@50000 {
105 reg = <0x50000 0xfb0000>; 96 label = "firmware";
106 }; -  
Line 107... Line 97...
107 }; 97 reg = <0x50000 0xfb0000>;
108 }; 98 };
109 }; 99 };
-   100 };
110   101  
-   102 &pcie {
111 &pcie { 103 status = "okay";
112 status = "okay"; -  
Line 113... Line 104...
113 }; 104  
114   105 pcie0 {
115 &pcie0 { 106 mt76@0,0 {
-   107 reg = <0x0000 0 0 0 0>;
116 mt76@0,0 { 108 device_type = "pci";
117 reg = <0x0000 0 0 0 0>; 109 mediatek,mtd-eeprom = <&factory 0x0000>;
118 mediatek,mtd-eeprom = <&factory 0x0000>; 110 };
119 }; 111 };
120 }; 112  
121   113 pcie1 {
-   114 mt76@1,0 {
122 &pcie1 { 115 reg = <0x0000 0 0 0 0>;
123 mt76@0,0 { 116 device_type = "pci";
124 reg = <0x0000 0 0 0 0>; 117 mediatek,mtd-eeprom = <&factory 0x8000>;
Line 125... Line 118...
125 mediatek,mtd-eeprom = <&factory 0x8000>; 118 ieee80211-freq-limit = <5000000 6000000>;