OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 4... Line 4...
4 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/input.h>
Line 5... Line 5...
5   5  
6 / { 6 / {
Line 7... Line 7...
7 compatible = "phicomm,psg1218", "ralink,mt7620a-soc"; 7 compatible = "phicomm,psg1218", "ralink,mt7620a-soc";
8   8  
-   9 gpio-keys-polled {
-   10 compatible = "gpio-keys-polled";
9 keys { 11 #address-cells = <1>;
Line 10... Line 12...
10 compatible = "gpio-keys-polled"; 12 #size-cells = <0>;
11 poll-interval = <20>; 13 poll-interval = <20>;
12   14  
Line 24... Line 26...
24   26  
25 &spi0 { 27 &spi0 {
Line 26... Line 28...
26 status = "okay"; 28 status = "okay";
-   29  
-   30 m25p80@0 {
27   31 #address-cells = <1>;
28 m25p80@0 { 32 #size-cells = <1>;
29 compatible = "jedec,spi-nor"; 33 compatible = "jedec,spi-nor";
Line 30... Line -...
30 reg = <0>; -  
31 spi-max-frequency = <10000000>; -  
32   -  
33 partitions { -  
34 compatible = "fixed-partitions"; -  
35 #address-cells = <1>; 34 reg = <0>;
36 #size-cells = <1>; 35 spi-max-frequency = <10000000>;
37   36  
38 partition@0 { 37 partition@0 {
39 label = "u-boot"; 38 label = "u-boot";
40 reg = <0x0 0x30000>; 39 reg = <0x0 0x30000>;
41 read-only; 40 read-only;
42 }; 41 };
43   42  
44 partition@20000 { 43 partition@20000 {
45 label = "u-boot-env"; 44 label = "u-boot-env";
46 reg = <0x30000 0x10000>; 45 reg = <0x30000 0x10000>;
47 read-only; 46 read-only;
48 }; 47 };
49   48  
50 factory: partition@30000 { 49 factory: partition@30000 {
51 label = "factory"; 50 label = "factory";
52 reg = <0x40000 0x10000>; 51 reg = <0x40000 0x10000>;
53 read-only; 52 read-only;
54 }; -  
55   53 };
56 partition@40000 { 54  
57 compatible = "denx,uimage"; -  
58 label = "firmware"; 55 partition@40000 {
59 reg = <0x50000 0x7b0000>; 56 label = "firmware";
60 }; 57 reg = <0x50000 0x7b0000>;
Line 61... Line 58...
61 }; 58 };
62 }; 59 };
63 }; -  
Line 64... Line 60...
64   60 };
65 &pcie { 61  
66 status = "okay"; 62 &pcie {
-   63 status = "okay";
67 }; 64  
68   65 pcie-bridge {
-   66 mt76@0,0 {
69 &pcie0 { 67 reg = <0x0000 0 0 0 0>;
70 mt76@0,0 { 68 device_type = "pci";
Line 71... Line 69...
71 reg = <0x0000 0 0 0 0>; 69 mediatek,mtd-eeprom = <&factory 0x8000>;
72 mediatek,mtd-eeprom = <&factory 0x8000>; 70 ieee80211-freq-limit = <5000000 6000000>;