OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
---|---|---|---|---|
Line 7... | Line 7... | |||
7 | |
7 | |
|
8 | / { |
8 | / { |
|
9 | compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc"; |
9 | compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc"; |
|
Line 10... | Line -... | |||
10 | model = "Planex MZK-750DHP"; |
- | ||
11 | |
- | ||
12 | aliases { |
- | ||
13 | led-boot = &led_power; |
- | ||
14 | led-failsafe = &led_power; |
- | ||
15 | led-running = &led_power; |
- | ||
16 | led-upgrade = &led_power; |
- | ||
17 | }; |
10 | model = "Planex MZK-750DHP"; |
|
18 | |
11 | |
|
Line 19... | Line 12... | |||
19 | leds { |
12 | gpio-leds { |
|
20 | compatible = "gpio-leds"; |
13 | compatible = "gpio-leds"; |
|
21 | |
14 | |
|
22 | wps { |
15 | wps { |
|
Line 23... | Line 16... | |||
23 | label = "mzk-750dhp:green:wps"; |
16 | label = "mzk-750dhp:green:wps"; |
|
24 | gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; |
17 | gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; |
|
25 | }; |
18 | }; |
|
26 | |
19 | |
|
Line 27... | Line 20... | |||
27 | led_power: power { |
20 | power { |
|
28 | label = "mzk-750dhp:green:power"; |
21 | label = "mzk-750dhp:green:power"; |
|
29 | gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
22 | gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
|
30 | }; |
23 | }; |
|
31 | |
24 | |
|
Line 32... | Line 25... | |||
32 | wlan5g { |
25 | wlan5g { |
|
33 | label = "mzk-750dhp:green:wlan5g"; |
26 | label = "mzk-750dhp:green:wlan5g"; |
|
- | 27 | gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; |
||
- | 28 | }; |
||
34 | gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; |
29 | }; |
|
Line 35... | Line 30... | |||
35 | }; |
30 | |
|
36 | }; |
31 | gpio-keys-polled { |
|
37 | |
32 | compatible = "gpio-keys-polled"; |
|
Line 63... | Line 58... | |||
63 | |
58 | |
|
64 | &spi0 { |
59 | &spi0 { |
|
Line 65... | Line 60... | |||
65 | status = "okay"; |
60 | status = "okay"; |
|
- | 61 | |
||
- | 62 | m25p80@0 { |
||
66 | |
63 | #address-cells = <1>; |
|
67 | m25p80@0 { |
64 | #size-cells = <1>; |
|
68 | compatible = "jedec,spi-nor"; |
65 | compatible = "jedec,spi-nor"; |
|
Line 69... | Line -... | |||
69 | reg = <0>; |
- | ||
70 | spi-max-frequency = <10000000>; |
- | ||
71 | |
- | ||
72 | partitions { |
- | ||
73 | compatible = "fixed-partitions"; |
- | ||
74 | #address-cells = <1>; |
66 | reg = <0>; |
|
75 | #size-cells = <1>; |
67 | spi-max-frequency = <10000000>; |
|
76 | |
68 | |
|
77 | partition@0 { |
69 | partition@0 { |
|
78 | label = "u-boot"; |
70 | label = "u-boot"; |
|
79 | reg = <0x0 0x30000>; |
71 | reg = <0x0 0x30000>; |
|
80 | read-only; |
72 | read-only; |
|
81 | }; |
73 | }; |
|
82 | |
74 | |
|
83 | partition@30000 { |
75 | partition@30000 { |
|
84 | label = "u-boot-env"; |
76 | label = "u-boot-env"; |
|
85 | reg = <0x30000 0x10000>; |
77 | reg = <0x30000 0x10000>; |
|
86 | read-only; |
78 | read-only; |
|
87 | }; |
79 | }; |
|
88 | |
80 | |
|
89 | factory: partition@40000 { |
81 | factory: partition@40000 { |
|
90 | label = "factory"; |
82 | label = "factory"; |
|
91 | reg = <0x40000 0x10000>; |
83 | reg = <0x40000 0x10000>; |
|
92 | read-only; |
84 | read-only; |
|
93 | }; |
- | ||
94 | |
85 | }; |
|
95 | partition@50000 { |
86 | |
|
96 | compatible = "denx,uimage"; |
- | ||
97 | label = "firmware"; |
87 | partition@50000 { |
|
98 | reg = <0x50000 0x7b0000>; |
88 | label = "firmware"; |
|
99 | }; |
89 | reg = <0x50000 0x7b0000>; |
|
Line 100... | Line 90... | |||
100 | }; |
90 | }; |
|
Line 125... | Line 115... | |||
125 | ralink,mtd-eeprom = <&factory 0>; |
115 | ralink,mtd-eeprom = <&factory 0>; |
|
126 | }; |
116 | }; |
|
Line 127... | Line 117... | |||
127 | |
117 | |
|
128 | &pcie { |
118 | &pcie { |
|
129 | status = "okay"; |
- | ||
Line 130... | Line 119... | |||
130 | }; |
119 | status = "okay"; |
|
131 | |
120 | |
|
132 | &pcie0 { |
121 | pcie-bridge { |
|
- | 122 | mt76@0,0 { |
||
133 | mt76@0,0 { |
123 | reg = <0x0000 0 0 0 0>; |
|
- | 124 | device_type = "pci"; |
||
134 | reg = <0x0000 0 0 0 0>; |
125 | mediatek,mtd-eeprom = <&factory 0x8000>; |
|
135 | mediatek,mtd-eeprom = <&factory 0x8000>; |
126 | }; |