OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 7... Line 7...
7   7  
8 / { 8 / {
9 compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc"; 9 compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
Line 10... Line -...
10 model = "D-Link DIR-860L B1"; -  
11   -  
12 aliases { -  
13 led-boot = &led_power_green; -  
14 led-failsafe = &led_power_green; -  
15 led-running = &led_power_green; -  
16 led-upgrade = &led_power_green; -  
17 }; 10 model = "D-Link DIR-860L B1";
18   11  
19 memory@0 { 12 memory@0 {
20 device_type = "memory"; 13 device_type = "memory";
Line 21... Line 14...
21 reg = <0x0 0x8000000>; 14 reg = <0x0 0x8000000>;
22 }; 15 };
23   16  
Line 24... Line 17...
24 chosen { 17 chosen {
25 bootargs = "console=ttyS0,57600"; 18 bootargs = "console=ttyS0,57600";
Line 26... Line 19...
26 }; 19 };
27   20  
28 leds { 21 gpio-leds {
29 compatible = "gpio-leds"; 22 compatible = "gpio-leds";
Line 30... Line 23...
30   23  
31 power { 24 power {
32 label = "dir-860l-b1:orange:power"; 25 label = "dir-860l-b1:orange:power";
33 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; 26 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
Line 34... Line 27...
34 }; 27 };
Line 47... Line 40...
47 label = "dir-860l-b1:green:net"; 40 label = "dir-860l-b1:green:net";
48 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; 41 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
49 }; 42 };
50 }; 43 };
Line 51... Line 44...
51   44  
52 keys { 45 gpio-keys-polled {
-   46 compatible = "gpio-keys-polled";
-   47 #address-cells = <1>;
53 compatible = "gpio-keys-polled"; 48 #size-cells = <0>;
Line 54... Line 49...
54 poll-interval = <20>; 49 poll-interval = <20>;
55   50  
56 reset { 51 reset {
Line 69... Line 64...
69   64  
70 &spi0 { 65 &spi0 {
Line 71... Line 66...
71 status = "okay"; 66 status = "okay";
-   67  
-   68 m25p80@0 {
72   69 #address-cells = <1>;
73 m25p80@0 { 70 #size-cells = <1>;
74 compatible = "jedec,spi-nor"; 71 compatible = "jedec,spi-nor";
-   72 reg = <0>;
-   73 spi-max-frequency = <10000000>;
-   74 m25p,chunked-io = <32>;
-   75  
-   76 partition@0 {
-   77 label = "u-boot";
-   78 reg = <0x0 0x30000>;
-   79 read-only;
-   80 };
-   81  
-   82 partition@30000 {
-   83 label = "u-boot-env";
-   84 reg = <0x30000 0x4000>;
-   85 read-only;
-   86 };
-   87  
-   88 radio: partition@34000 {
-   89 label = "radio";
-   90 reg = <0x34000 0x4000>;
Line 75... Line -...
75 reg = <0>; -  
76 spi-max-frequency = <10000000>; -  
77   -  
78 partitions { -  
79 compatible = "fixed-partitions"; -  
80 #address-cells = <1>; -  
81 #size-cells = <1>; -  
82   -  
83 partition@0 { -  
84 label = "u-boot"; -  
85 reg = <0x0 0x30000>; -  
86 read-only; -  
87 }; -  
88   -  
89 partition@30000 { -  
90 label = "u-boot-env"; -  
91 reg = <0x30000 0x4000>; -  
92 read-only; -  
93 }; -  
94   -  
95 radio: partition@34000 { -  
96 label = "radio"; -  
97 reg = <0x34000 0x4000>; -  
98 read-only; 91 read-only;
99 }; 92 };
100   93  
101 factory: partition@38000 { 94 factory: partition@38000 {
102 label = "factory"; 95 label = "factory";
103 reg = <0x38000 0x8000>; 96 reg = <0x38000 0x8000>;
104 read-only; 97 read-only;
105 }; 98 };
106   99  
107 partition@40000 { 100 partition@40000 {
108 label = "defaults"; 101 label = "defaults";
109 reg = <0x40000 0x10000>; 102 reg = <0x40000 0x10000>;
110 read-only; 103 read-only;
111 }; -  
112   104 };
113 partition@50000 { 105  
114 compatible = "seama"; -  
115 label = "firmware"; 106 partition@50000 {
116 reg = <0x50000 0xfb0000>; 107 label = "firmware";
117 }; 108 reg = <0x50000 0xfb0000>;
Line 118... Line 109...
118 }; 109 };
119 }; 110 };
120 }; -  
Line 121... Line 111...
121   111 };
122 &pcie { 112  
123 status = "okay"; 113 &pcie {
-   114 status = "okay";
124 }; 115  
125   116 pcie0 {
-   117 mt76@0,0 {
126 &pcie0 { 118 reg = <0x0000 0 0 0 0>;
127 mt76@0,0 { -  
Line 128... Line 119...
128 reg = <0x0000 0 0 0 0>; 119 device_type = "pci";
129 mediatek,mtd-eeprom = <&radio 0x2000>; 120 mediatek,mtd-eeprom = <&radio 0x2000>;
130 ieee80211-freq-limit = <5000000 6000000>; 121 ieee80211-freq-limit = <5000000 6000000>;
-   122 };
131 }; 123 };
132 }; 124  
-   125 pcie1 {
133   126 mt76@1,0 {
134 &pcie1 { 127 reg = <0x0000 0 0 0 0>;
Line 135... Line 128...
135 mt76@0,0 { 128 device_type = "pci";
136 reg = <0x0000 0 0 0 0>; 129 mediatek,mtd-eeprom = <&radio 0>;