OpenWrt – Diff between revs 2 and 3
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1 | // SPDX-License-Identifier: GPL-2.0 |
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2 | /* |
1 | /* |
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3 | * Device Tree Source for Meraki MR33 (Stinkbug) |
2 | * Device Tree Source for Meraki MR33 (Stinkbug) |
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4 | * |
3 | * |
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5 | * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com> |
4 | * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com> |
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6 | * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com> |
5 | * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com> |
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11 | * License version 2. This program is licensed "as is" without |
10 | * License version 2. This program is licensed "as is" without |
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12 | * any warranty of any kind, whether express or implied. |
11 | * any warranty of any kind, whether express or implied. |
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13 | */ |
12 | */ |
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14 | |
13 | |
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- | 14 | #include "qcom-ipq4019.dtsi" |
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15 | #include "qcom-ipq4019.dtsi" |
15 | #include "qcom-ipq4019-bus.dtsi" |
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16 | #include <dt-bindings/gpio/gpio.h> |
16 | #include <dt-bindings/gpio/gpio.h> |
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17 | #include <dt-bindings/input/input.h> |
17 | #include <dt-bindings/input/input.h> |
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18 | #include <dt-bindings/soc/qcom,tcsr.h> |
18 | #include <dt-bindings/soc/qcom,tcsr.h> |
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68 | compatible = "qcom,tcsr"; |
68 | compatible = "qcom,tcsr"; |
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69 | reg = <0x1957000 0x100>; |
69 | reg = <0x1957000 0x100>; |
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70 | qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; |
70 | qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; |
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71 | }; |
71 | }; |
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- | 72 | |
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- | 73 | serial@78af000 { |
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- | 74 | pinctrl-0 = <&serial_0_pins>; |
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- | 75 | pinctrl-names = "default"; |
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- | 76 | status = "okay"; |
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- | 77 | }; |
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72 | |
78 | |
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73 | serial@78b0000 { |
79 | serial@78b0000 { |
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74 | pinctrl-0 = <&serial_1_pins>; |
80 | pinctrl-0 = <&serial_1_pins>; |
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75 | pinctrl-names = "default"; |
81 | pinctrl-names = "default"; |
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101 | phy-mode = "rgmii-rxid"; |
107 | phy-mode = "rgmii-rxid"; |
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102 | status = "okay"; |
108 | status = "okay"; |
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103 | }; |
109 | }; |
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104 | }; |
110 | }; |
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105 | |
111 | |
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106 | keys { |
112 | gpio-keys { |
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107 | compatible = "gpio-keys"; |
113 | compatible = "gpio-keys"; |
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108 | |
114 | |
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109 | reset { |
115 | reset { |
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110 | label = "reset"; |
116 | label = "reset"; |
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111 | gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; |
117 | gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; |
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112 | linux,code = <KEY_RESTART>; |
118 | linux,code = <KEY_RESTART>; |
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113 | }; |
119 | }; |
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114 | }; |
120 | }; |
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115 | |
121 | |
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116 | leds { |
122 | gpio-leds { |
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117 | compatible = "gpio-leds"; |
123 | compatible = "gpio-leds"; |
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126 | |
132 | |
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127 | &blsp_dma { |
133 | &blsp_dma { |
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128 | status = "okay"; |
134 | status = "okay"; |
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129 | }; |
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130 | |
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131 | &blsp1_uart1 { |
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132 | pinctrl-0 = <&serial_0_pins>; |
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133 | pinctrl-names = "default"; |
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134 | status = "okay"; |
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135 | }; |
135 | }; |
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136 | |
136 | |
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137 | &cryptobam { |
137 | &cryptobam { |
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138 | status = "okay"; |
138 | status = "okay"; |
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139 | }; |
139 | }; |
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140 | |
140 | |
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141 | &gmac0 { |
141 | &gmac0 { |
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142 | qcom,phy_mdio_addr = <1>; |
142 | qcom,phy_mdio_addr = <1>; |
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143 | qcom,poll_required = <1>; |
143 | qcom,poll_required = <1>; |
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144 | vlan_tag = <0 0x20>; |
144 | vlan_tag = <0 0x20>; |
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145 | }; |
145 | }; |
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146 | |
146 | |
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147 | &blsp1_i2c3{ |
147 | &i2c_0 { |
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148 | pinctrl-0 = <&i2c_0_pins>; |
148 | pinctrl-0 = <&i2c_0_pins>; |
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154 | reg = <0x50>; |
154 | reg = <0x50>; |
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155 | read-only; /* This holds our MAC & Meraki board-data */ |
155 | read-only; /* This holds our MAC & Meraki board-data */ |
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156 | }; |
156 | }; |
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157 | }; |
157 | }; |
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158 | |
158 | |
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159 | &blsp1_i2c4{ |
159 | &i2c_1 { |
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160 | pinctrl-0 = <&i2c_1_pins>; |
160 | pinctrl-0 = <&i2c_1_pins>; |
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161 | pinctrl-names = "default"; |
161 | pinctrl-names = "default"; |
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162 | status = "okay"; |
162 | status = "okay"; |
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- | 163 | |
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163 | |
164 | lp5562@30 { |
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164 | led-controller@30 { |
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165 | compatible = "ti,lp5562"; |
165 | enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>; |
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166 | reg = <0x30>; |
166 | compatible = "ti,lp5562"; |
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167 | clock-mode = /bits/8 <2>; |
167 | clock-mode = /bits/8 <2>; |
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168 | enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>; |
168 | reg = <0x30>; |
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169 | |
169 | |
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170 | /* RGB led */ |
170 | /* RGB led */ |
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270 | |
270 | |
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271 | &pcie0 { |
271 | &pcie0 { |
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272 | status = "okay"; |
272 | status = "okay"; |
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273 | perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; |
273 | perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; |
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274 | wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; |
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275 | |
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276 | bridge@0,0 { |
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277 | reg = <0x00000000 0 0 0 0>; |
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278 | #address-cells = <3>; |
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279 | #size-cells = <2>; |
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280 | ranges; |
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281 | |
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282 | wifi2: wifi@1,0 { |
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283 | compatible = "qcom,ath10k"; |
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284 | status = "okay"; |
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285 | reg = <0x00010000 0 0 0 0>; |
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286 | }; |
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287 | }; |
274 | wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; |
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288 | }; |
275 | }; |
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289 | |
276 | |
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290 | &qpic_bam { |
277 | &qpic_bam { |