OpenWrt – Diff between revs 2 and 3
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| Rev 2 | Rev 3 | |||
|---|---|---|---|---|
| Line 72... | Line 72... | |||
| 72 | |
72 | |
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| 73 | usb2@60f8800 { |
73 | usb2@60f8800 { |
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| 74 | status = "okay"; |
74 | status = "okay"; |
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| Line -... | Line 75... | |||
| - | 75 | }; |
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| - | 76 | |
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| - | 77 | serial@78af000 { |
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| - | 78 | pinctrl-0 = <&serial_pins>; |
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| - | 79 | pinctrl-names = "default"; |
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| - | 80 | status = "okay"; |
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| 75 | }; |
81 | }; |
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| 76 | |
82 | |
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| 77 | usb3@8af8800 { |
83 | usb3@8af8800 { |
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| Line 78... | Line 84... | |||
| 78 | status = "okay"; |
84 | status = "okay"; |
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| Line 95... | Line 101... | |||
| 95 | edma@c080000 { |
101 | edma@c080000 { |
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| 96 | status = "okay"; |
102 | status = "okay"; |
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| 97 | }; |
103 | }; |
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| 98 | }; |
104 | }; |
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| Line 99... | Line 105... | |||
| 99 | |
105 | |
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| 100 | keys { |
106 | gpio-keys { |
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| Line 101... | Line 107... | |||
| 101 | compatible = "gpio-keys"; |
107 | compatible = "gpio-keys"; |
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| 102 | |
108 | |
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| 103 | wps { |
109 | wps { |
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| Line 111... | Line 117... | |||
| 111 | gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; |
117 | gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; |
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| 112 | linux,code = <KEY_RESTART>; |
118 | linux,code = <KEY_RESTART>; |
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| 113 | }; |
119 | }; |
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| 114 | }; |
120 | }; |
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| Line 115... | Line 121... | |||
| 115 | |
121 | |
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| 116 | leds { |
122 | gpio-leds { |
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| Line 117... | Line 123... | |||
| 117 | compatible = "gpio-leds"; |
123 | compatible = "gpio-leds"; |
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| 118 | |
124 | |
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| 119 | power: power { |
125 | power: power { |
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| Line 140... | Line 146... | |||
| 140 | |
146 | |
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| 141 | &cryptobam { |
147 | &cryptobam { |
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| 142 | status = "okay"; |
148 | status = "okay"; |
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| Line 143... | Line 149... | |||
| 143 | }; |
149 | }; |
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| 144 | |
150 | |
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| 145 | &blsp1_spi1 { |
151 | &spi_0 { |
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| 146 | pinctrl-0 = <&spi_0_pins>; |
152 | pinctrl-0 = <&spi_0_pins>; |
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| 147 | pinctrl-names = "default"; |
153 | pinctrl-names = "default"; |
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| Line 153... | Line 159... | |||
| 153 | #address-cells = <1>; |
159 | #address-cells = <1>; |
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| 154 | #size-cells = <1>; |
160 | #size-cells = <1>; |
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| 155 | reg = <0>; |
161 | reg = <0>; |
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| 156 | spi-max-frequency = <24000000>; |
162 | spi-max-frequency = <24000000>; |
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| Line 157... | Line -... | |||
| 157 | |
- | ||
| 158 | partitions { |
- | ||
| 159 | compatible = "fixed-partitions"; |
- | ||
| 160 | #address-cells = <1>; |
- | ||
| 161 | #size-cells = <1>; |
- | ||
| 162 | |
163 | |
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| 163 | SBL1@0 { |
164 | SBL1@0 { |
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| 164 | label = "SBL1"; |
165 | label = "SBL1"; |
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| 165 | reg = <0x0 0x40000>; |
- | ||
| 166 | read-only; |
- | ||
| 167 | }; |
- | ||
| 168 | |
- | ||
| 169 | MIBIB@40000 { |
- | ||
| 170 | label = "MIBIB"; |
- | ||
| 171 | reg = <0x40000 0x20000>; |
- | ||
| 172 | read-only; |
- | ||
| 173 | }; |
- | ||
| 174 | |
- | ||
| 175 | QSEE@60000 { |
- | ||
| 176 | label = "QSEE"; |
- | ||
| 177 | reg = <0x60000 0x60000>; |
- | ||
| 178 | read-only; |
- | ||
| 179 | }; |
- | ||
| 180 | |
- | ||
| 181 | CDT@c0000 { |
- | ||
| 182 | label = "CDT"; |
- | ||
| 183 | reg = <0xc0000 0x10000>; |
- | ||
| 184 | read-only; |
- | ||
| 185 | }; |
- | ||
| 186 | |
- | ||
| 187 | DDRPARAMS@d0000 { |
- | ||
| 188 | label = "DDRPARAMS"; |
- | ||
| 189 | reg = <0xd0000 0x10000>; |
- | ||
| 190 | read-only; |
- | ||
| 191 | }; |
- | ||
| 192 | |
- | ||
| 193 | APPSBLENV@e0000 { |
- | ||
| 194 | label = "APPSBLENV"; |
- | ||
| 195 | reg = <0xe0000 0x10000>; |
- | ||
| 196 | read-only; |
- | ||
| 197 | }; |
- | ||
| 198 | |
- | ||
| 199 | APPSBL@f0000 { |
- | ||
| 200 | label = "APPSBL"; |
- | ||
| 201 | reg = <0xf0000 0x80000>; |
- | ||
| 202 | read-only; |
- | ||
| 203 | }; |
- | ||
| 204 | |
- | ||
| 205 | ART@170000 { |
- | ||
| 206 | label = "ART"; |
- | ||
| 207 | reg = <0x170000 0x10000>; |
166 | reg = <0x0 0x40000>; |
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| 208 | read-only; |
- | ||
| 209 | }; |
- | ||
| 210 | |
- | ||
| 211 | firmware@180000 { |
- | ||
| 212 | compatible = "denx,fit"; |
- | ||
| 213 | label = "firmware"; |
- | ||
| 214 | reg = <0x180000 0x1e80000>; |
- | ||
| 215 | }; |
167 | read-only; |
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| 216 | }; |
- | ||
| 217 | }; |
- | ||
| Line -... | Line 168... | |||
| - | 168 | }; |
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| - | 169 | |
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| - | 170 | MIBIB@40000 { |
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| - | 171 | label = "MIBIB"; |
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| - | 172 | reg = <0x40000 0x20000>; |
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| - | 173 | read-only; |
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| 218 | }; |
174 | }; |
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| - | 175 | |
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| - | 176 | QSEE@60000 { |
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| - | 177 | label = "QSEE"; |
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| - | 178 | reg = <0x60000 0x60000>; |
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| - | 179 | read-only; |
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| - | 180 | }; |
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| - | 181 | |
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| - | 182 | CDT@c0000 { |
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| - | 183 | label = "CDT"; |
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| - | 184 | reg = <0xc0000 0x10000>; |
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| - | 185 | read-only; |
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| - | 186 | }; |
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| - | 187 | |
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| - | 188 | DDRPARAMS@d0000 { |
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| - | 189 | label = "DDRPARAMS"; |
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| - | 190 | reg = <0xd0000 0x10000>; |
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| - | 191 | read-only; |
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| - | 192 | }; |
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| - | 193 | |
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| 219 | |
194 | APPSBLENV@e0000 { |
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| - | 195 | label = "APPSBLENV"; |
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| - | 196 | reg = <0xe0000 0x10000>; |
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| - | 197 | read-only; |
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| - | 198 | }; |
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| 220 | &blsp1_uart1 { |
199 | |
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| - | 200 | APPSBL@f0000 { |
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| - | 201 | label = "APPSBL"; |
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| - | 202 | reg = <0xf0000 0x80000>; |
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| - | 203 | read-only; |
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| - | 204 | }; |
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| 221 | pinctrl-0 = <&serial_pins>; |
205 | |
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| - | 206 | ART@170000 { |
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| - | 207 | label = "ART"; |
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| - | 208 | reg = <0x170000 0x10000>; |
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| - | 209 | read-only; |
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| - | 210 | }; |
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| - | 211 | |
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| - | 212 | firmware@180000 { |
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| - | 213 | label = "firmware"; |
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| - | 214 | reg = <0x180000 0x1e80000>; |
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| 222 | pinctrl-names = "default"; |
215 | }; |
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| Line 223... | Line 216... | |||
| 223 | status = "okay"; |
216 | }; |
|
| 224 | }; |
217 | }; |
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| 225 | |
218 | |
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