OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 110... Line 110...
110 #define AR8216_ATU_ADDR0 BITS(24, 8) 110 #define AR8216_ATU_ADDR0 BITS(24, 8)
111 #define AR8216_ATU_ADDR0_S 24 111 #define AR8216_ATU_ADDR0_S 24
Line 112... Line 112...
112   112  
113 #define AR8216_REG_ATU_FUNC2 0x0058 113 #define AR8216_REG_ATU_FUNC2 0x0058
114 #define AR8216_ATU_PORTS BITS(0, 6) -  
115 #define AR8216_ATU_PORTS_S 0 114 #define AR8216_ATU_PORTS BITS(0, 6)
116 #define AR8216_ATU_PORT0 BIT(0) 115 #define AR8216_ATU_PORT0 BIT(0)
117 #define AR8216_ATU_PORT1 BIT(1) 116 #define AR8216_ATU_PORT1 BIT(1)
118 #define AR8216_ATU_PORT2 BIT(2) 117 #define AR8216_ATU_PORT2 BIT(2)
119 #define AR8216_ATU_PORT3 BIT(3) 118 #define AR8216_ATU_PORT3 BIT(3)
Line 366... Line 365...
366 AR8XXX_ARL_INITIALIZE, 365 AR8XXX_ARL_INITIALIZE,
367 AR8XXX_ARL_GET_NEXT 366 AR8XXX_ARL_GET_NEXT
368 }; 367 };
Line 369... Line 368...
369   368  
370 struct arl_entry { 369 struct arl_entry {
371 u16 portmap; 370 u8 port;
372 u8 mac[6]; 371 u8 mac[6];
Line 373... Line 372...
373 }; 372 };
Line 411... Line 410...
411 void (*phy_fixup)(struct ar8xxx_priv *priv, int phy); 410 void (*phy_fixup)(struct ar8xxx_priv *priv, int phy);
412 void (*set_mirror_regs)(struct ar8xxx_priv *priv); 411 void (*set_mirror_regs)(struct ar8xxx_priv *priv);
413 void (*get_arl_entry)(struct ar8xxx_priv *priv, struct arl_entry *a, 412 void (*get_arl_entry)(struct ar8xxx_priv *priv, struct arl_entry *a,
414 u32 *status, enum arl_op op); 413 u32 *status, enum arl_op op);
415 int (*sw_hw_apply)(struct switch_dev *dev); 414 int (*sw_hw_apply)(struct switch_dev *dev);
416 void (*phy_rgmii_set)(struct ar8xxx_priv *priv, struct phy_device *phydev); -  
Line 417... Line 415...
417   415  
418 const struct ar8xxx_mib_desc *mib_decs; 416 const struct ar8xxx_mib_desc *mib_decs;
419 unsigned num_mibs; 417 unsigned num_mibs;
420 unsigned mib_func; 418 unsigned mib_func;
Line 477... Line 475...
477 ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val); 475 ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val);
478 u32 476 u32
479 ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val); 477 ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val);
Line 480... Line 478...
480   478  
481 void -  
482 ar8xxx_phy_dbg_read(struct ar8xxx_priv *priv, int phy_addr, -  
483 u16 dbg_addr, u16 *dbg_data); -  
484 void 479 void
485 ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr, 480 ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
486 u16 dbg_addr, u16 dbg_data); 481 u16 dbg_addr, u16 dbg_data);
487 void 482 void
488 ar8xxx_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg, u16 data); 483 ar8xxx_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 reg, u16 data);