OpenWrt – Diff between revs 2 and 3
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Rev 2 | Rev 3 | |||
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Line 138... | Line 138... | |||
138 | + .flags = SPI_NOR_NO_FR | SPI_S3AN, |
138 | + .flags = SPI_NOR_NO_FR | SPI_S3AN, |
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139 | + |
139 | + |
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140 | /* NOTE: double check command sets and memory organization when you add |
140 | /* NOTE: double check command sets and memory organization when you add |
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141 | * more nor chips. This current list focusses on newer chips, which |
141 | * more nor chips. This current list focusses on newer chips, which |
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142 | * have been converging on command sets which including JEDEC ID. |
142 | * have been converging on command sets which including JEDEC ID. |
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143 | @@ -1020,6 +1079,13 @@ static const struct flash_info spi_nor_i |
143 | @@ -1014,6 +1073,13 @@ static const struct flash_info spi_nor_i |
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144 | { "cat25c09", CAT25_INFO( 128, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
144 | { "cat25c09", CAT25_INFO( 128, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
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145 | { "cat25c17", CAT25_INFO( 256, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
145 | { "cat25c17", CAT25_INFO( 256, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
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146 | { "cat25128", CAT25_INFO(2048, 8, 64, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
146 | { "cat25128", CAT25_INFO(2048, 8, 64, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, |
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147 | + |
147 | + |
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148 | + /* Xilinx S3AN Internal Flash */ |
148 | + /* Xilinx S3AN Internal Flash */ |
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Line 152... | Line 152... | |||
152 | + { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, |
152 | + { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, |
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153 | + { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, |
153 | + { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, |
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154 | { }, |
154 | { }, |
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155 | }; |
155 | }; |
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Line 156... | Line 156... | |||
156 | |
156 | |
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157 | @@ -1060,7 +1126,12 @@ static int spi_nor_read(struct mtd_info |
157 | @@ -1054,7 +1120,12 @@ static int spi_nor_read(struct mtd_info |
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Line 158... | Line 158... | |||
158 | return ret; |
158 | return ret; |
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159 | |
159 | |
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160 | while (len) { |
160 | while (len) { |
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Line 166... | Line 166... | |||
166 | + |
166 | + |
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167 | + ret = nor->read(nor, addr, len, buf); |
167 | + ret = nor->read(nor, addr, len, buf); |
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168 | if (ret == 0) { |
168 | if (ret == 0) { |
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169 | /* We shouldn't see 0-length reads */ |
169 | /* We shouldn't see 0-length reads */ |
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170 | ret = -EIO; |
170 | ret = -EIO; |
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171 | @@ -1181,8 +1252,23 @@ static int spi_nor_write(struct mtd_info |
171 | @@ -1175,8 +1246,23 @@ static int spi_nor_write(struct mtd_info |
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Line 172... | Line 172... | |||
172 | |
172 | |
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173 | for (i = 0; i < len; ) { |
173 | for (i = 0; i < len; ) { |
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174 | ssize_t written; |
174 | ssize_t written; |
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Line 191... | Line 191... | |||
191 | + page_offset = do_div(aux, nor->page_size); |
191 | + page_offset = do_div(aux, nor->page_size); |
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192 | + } |
192 | + } |
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193 | WARN_ONCE(page_offset, |
193 | WARN_ONCE(page_offset, |
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194 | "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.", |
194 | "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.", |
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195 | page_offset); |
195 | page_offset); |
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196 | @@ -1190,8 +1276,11 @@ static int spi_nor_write(struct mtd_info |
196 | @@ -1184,8 +1270,11 @@ static int spi_nor_write(struct mtd_info |
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197 | page_remain = min_t(size_t, |
197 | page_remain = min_t(size_t, |
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198 | nor->page_size - page_offset, len - i); |
198 | nor->page_size - page_offset, len - i); |
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Line 199... | Line 199... | |||
199 | |
199 | |
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200 | + if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) |
200 | + if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) |
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Line 204... | Line 204... | |||
204 | - ret = nor->write(nor, to + i, page_remain, buf + i); |
204 | - ret = nor->write(nor, to + i, page_remain, buf + i); |
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205 | + ret = nor->write(nor, addr, page_remain, buf + i); |
205 | + ret = nor->write(nor, addr, page_remain, buf + i); |
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206 | if (ret < 0) |
206 | if (ret < 0) |
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207 | goto write_err; |
207 | goto write_err; |
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208 | written = ret; |
208 | written = ret; |
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209 | @@ -1325,6 +1414,47 @@ static int spi_nor_check(struct spi_nor |
209 | @@ -1319,6 +1408,47 @@ static int spi_nor_check(struct spi_nor |
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210 | return 0; |
210 | return 0; |
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211 | } |
211 | } |
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Line 212... | Line 212... | |||
212 | |
212 | |
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213 | +static int s3an_nor_scan(const struct flash_info *info, struct spi_nor *nor) |
213 | +static int s3an_nor_scan(const struct flash_info *info, struct spi_nor *nor) |
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Line 252... | Line 252... | |||
252 | +} |
252 | +} |
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253 | + |
253 | + |
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254 | int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) |
254 | int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) |
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255 | { |
255 | { |
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256 | const struct flash_info *info = NULL; |
256 | const struct flash_info *info = NULL; |
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257 | @@ -1373,6 +1503,14 @@ int spi_nor_scan(struct spi_nor *nor, co |
257 | @@ -1367,6 +1497,14 @@ int spi_nor_scan(struct spi_nor *nor, co |
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258 | mutex_init(&nor->lock); |
258 | mutex_init(&nor->lock); |
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Line 259... | Line 259... | |||
259 | |
259 | |
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260 | /* |
260 | /* |
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261 | + * Make sure the XSR_RDY flag is set before calling |
261 | + * Make sure the XSR_RDY flag is set before calling |
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Line 267... | Line 267... | |||
267 | + |
267 | + |
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268 | + /* |
268 | + /* |
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269 | * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up |
269 | * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up |
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270 | * with the software protection bits set |
270 | * with the software protection bits set |
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271 | */ |
271 | */ |
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272 | @@ -1530,6 +1668,12 @@ int spi_nor_scan(struct spi_nor *nor, co |
272 | @@ -1524,6 +1662,12 @@ int spi_nor_scan(struct spi_nor *nor, co |
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Line 273... | Line 273... | |||
273 | |
273 | |
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Line 274... | Line 274... | |||
274 | nor->read_dummy = spi_nor_read_dummy_cycles(nor); |
274 | nor->read_dummy = spi_nor_read_dummy_cycles(nor); |
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275 | |
275 | |