OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
---|---|---|---|---|
Line 3... | Line 3... | |||
3 | * |
3 | * |
|
4 | * - MikroTik RouterBOARD mAP 2nD |
4 | * - MikroTik RouterBOARD mAP 2nD |
|
5 | * - MikroTik RouterBOARD mAP L-2nD |
5 | * - MikroTik RouterBOARD mAP L-2nD |
|
6 | * - MikroTik RouterBOARD 911-2Hn (911 Lite2) |
6 | * - MikroTik RouterBOARD 911-2Hn (911 Lite2) |
|
7 | * - MikroTik RouterBOARD 911-5Hn (911 Lite5) |
7 | * - MikroTik RouterBOARD 911-5Hn (911 Lite5) |
|
8 | * - MikroTik RouterBOARD 931-2nD (hAP mini) |
- | ||
9 | * - MikroTik RouterBOARD 941L-2nD |
8 | * - MikroTik RouterBOARD 941L-2nD |
|
10 | * - MikroTik RouterBOARD 951Ui-2nD |
9 | * - MikroTik RouterBOARD 951Ui-2nD |
|
11 | * - MikroTik RouterBOARD 952Ui-5ac2nD |
10 | * - MikroTik RouterBOARD 952Ui-5ac2nD |
|
12 | * - MikroTik RouterBOARD 962UiGS-5HacT2HnT |
11 | * - MikroTik RouterBOARD 962UiGS-5HacT2HnT |
|
13 | * - MikroTik RouterBOARD 750UP r2 |
12 | * - MikroTik RouterBOARD 750UP r2 |
|
14 | * - MikroTik RouterBOARD 750P-PBr2 |
13 | * - MikroTik RouterBOARD 750P-PBr2 |
|
15 | * - MikroTik RouterBOARD 750 r2 |
14 | * - MikroTik RouterBOARD 750 r2 |
|
16 | * - MikroTik RouterBOARD LHG 5nD |
15 | * - MikroTik RouterBOARD LHG 5nD |
|
17 | * - MikroTik RouterBOARD wAP2nD |
16 | * - MikroTik RouterBOARD wAP2nD |
|
18 | * - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC) |
17 | * - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC) |
|
19 | * - MikroTik RouterBOARD wAP R-2nD |
- | ||
20 | * |
18 | * |
|
21 | * Preliminary support for the following hardware |
19 | * Preliminary support for the following hardware |
|
22 | * - MikroTik RouterBOARD cAP2nD |
20 | * - MikroTik RouterBOARD cAP2nD |
|
23 | * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same |
21 | * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same |
|
24 | * hardware as the mAP L-2nD. It is unknown if they share the same board |
22 | * hardware as the mAP L-2nD. It is unknown if they share the same board |
|
25 | * identifier. |
23 | * identifier. |
|
26 | * |
24 | * |
|
27 | * Copyright (C) 2017-2018 Thibaut VARENE <varenet@parisc-linux.org> |
25 | * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org> |
|
28 | * Copyright (C) 2016 David Hutchison <dhutchison@bluemesh.net> |
26 | * Copyright (C) 2016 David Hutchison <dhutchison@bluemesh.net> |
|
29 | * Copyright (C) 2017 Ryan Mounce <ryan@mounce.com.au> |
27 | * Copyright (C) 2017 Ryan Mounce <ryan@mounce.com.au> |
|
30 | * |
28 | * |
|
31 | * This program is free software; you can redistribute it and/or modify it |
29 | * This program is free software; you can redistribute it and/or modify it |
|
32 | * under the terms of the GNU General Public License version 2 as published |
30 | * under the terms of the GNU General Public License version 2 as published |
|
Line 211... | Line 209... | |||
211 | #define RB952_GPIO_SSR_CS 11 |
209 | #define RB952_GPIO_SSR_CS 11 |
|
212 | #define RB952_GPIO_LED_USER 4 |
210 | #define RB952_GPIO_LED_USER 4 |
|
213 | #define RB952_GPIO_POE_POWER 14 |
211 | #define RB952_GPIO_POE_POWER 14 |
|
214 | #define RB952_GPIO_POE_STATUS 12 |
212 | #define RB952_GPIO_POE_STATUS 12 |
|
215 | #define RB952_GPIO_BTN_RESET 16 |
213 | #define RB952_GPIO_BTN_RESET 16 |
|
216 | #define RB952_GPIO_USB_PWROFF RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER) |
214 | #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER) |
|
217 | #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1) |
215 | #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1) |
|
218 | #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2) |
216 | #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2) |
|
219 | #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3) |
217 | #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3) |
|
220 | #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4) |
218 | #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4) |
|
221 | #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5) |
219 | #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5) |
|
Line 253... | Line 251... | |||
253 | }, |
251 | }, |
|
254 | }; |
252 | }; |
|
Line 255... | Line 253... | |||
255 | |
253 | |
|
256 | |
- | ||
257 | /* RB 962UiGS-5HacT2HnT gpios */ |
- | ||
258 | #define RB962_WIFI_LED_1 1 |
254 | |
|
259 | #define RB962_WIFI_LED_2 2 |
255 | /* RB 962UiGS-5HacT2HnT gpios */ |
|
260 | #define RB962_GPIO_POE_STATUS 2 |
256 | #define RB962_GPIO_POE_STATUS 2 |
|
261 | #define RB962_GPIO_POE_POWER 3 |
257 | #define RB962_GPIO_POE_POWER 3 |
|
262 | #define RB962_GPIO_LED_USER 12 |
258 | #define RB962_GPIO_LED_USER 12 |
|
Line 263... | Line 259... | |||
263 | #define RB962_GPIO_USB_PWROFF 13 |
259 | #define RB962_GPIO_USB_POWER 13 |
|
264 | #define RB962_GPIO_BTN_RESET 20 |
260 | #define RB962_GPIO_BTN_RESET 20 |
|
265 | |
261 | |
|
Line 326... | Line 322... | |||
326 | }; |
322 | }; |
|
Line 327... | Line 323... | |||
327 | |
323 | |
|
328 | static struct mdio_board_info rb962_mdio0_info[] = { |
324 | static struct mdio_board_info rb962_mdio0_info[] = { |
|
329 | { |
325 | { |
|
330 | .bus_id = "ag71xx-mdio.0", |
326 | .bus_id = "ag71xx-mdio.0", |
|
331 | .mdio_addr = 0, |
327 | .phy_addr = 0, |
|
332 | .platform_data = &rb962_ar8327_data, |
328 | .platform_data = &rb962_ar8327_data, |
|
333 | }, |
329 | }, |
|
Line 334... | Line 330... | |||
334 | }; |
330 | }; |
|
Line 388... | Line 384... | |||
388 | #define RBMAP_GPIO_BTN_RESET 16 |
384 | #define RBMAP_GPIO_BTN_RESET 16 |
|
389 | #define RBMAP_GPIO_SSR_CS 11 |
385 | #define RBMAP_GPIO_SSR_CS 11 |
|
390 | #define RBMAP_GPIO_LED_POWER 4 |
386 | #define RBMAP_GPIO_LED_POWER 4 |
|
391 | #define RBMAP_GPIO_POE_POWER 14 |
387 | #define RBMAP_GPIO_POE_POWER 14 |
|
392 | #define RBMAP_GPIO_POE_STATUS 12 |
388 | #define RBMAP_GPIO_POE_STATUS 12 |
|
393 | #define RBMAP_GPIO_USB_PWROFF RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER) |
389 | #define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER) |
|
394 | #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1) |
390 | #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1) |
|
395 | #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2) |
391 | #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2) |
|
396 | #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO) |
392 | #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO) |
|
397 | #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER) |
393 | #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER) |
|
398 | #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN) |
394 | #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN) |
|
Line 520... | Line 516... | |||
520 | #define RB911L_GPIO_LED_4 21 |
516 | #define RB911L_GPIO_LED_4 21 |
|
521 | #define RB911L_GPIO_LED_5 18 |
517 | #define RB911L_GPIO_LED_5 18 |
|
522 | #define RB911L_GPIO_LED_ETH 20 |
518 | #define RB911L_GPIO_LED_ETH 20 |
|
523 | #define RB911L_GPIO_LED_POWER 11 |
519 | #define RB911L_GPIO_LED_POWER 11 |
|
524 | #define RB911L_GPIO_LED_USER 3 |
520 | #define RB911L_GPIO_LED_USER 3 |
|
525 | #define RB911L_GPIO_PIN_HOLE 14 /* for reference, active low */ |
521 | #define RB911L_GPIO_PIN_HOLE 14 /* for reference */ |
|
Line 526... | Line 522... | |||
526 | |
522 | |
|
527 | static struct gpio_led rb911l_leds[] __initdata = { |
523 | static struct gpio_led rb911l_leds[] __initdata = { |
|
528 | { |
524 | { |
|
529 | .name = "rb:green:eth", |
525 | .name = "rb:green:eth", |
|
Line 551... | Line 547... | |||
551 | .active_low = 1, |
547 | .active_low = 1, |
|
552 | }, { |
548 | }, { |
|
553 | .name = "rb:green:power", |
549 | .name = "rb:green:power", |
|
554 | .gpio = RB911L_GPIO_LED_POWER, |
550 | .gpio = RB911L_GPIO_LED_POWER, |
|
555 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
551 | .default_state = LEDS_GPIO_DEFSTATE_ON, |
|
556 | .active_low = 1, |
- | ||
557 | .open_drain = 1, |
552 | .open_drain = 1, |
|
558 | }, { |
553 | }, { |
|
559 | .name = "rb:green:user", |
554 | .name = "rb:green:user", |
|
560 | .gpio = RB911L_GPIO_LED_USER, |
555 | .gpio = RB911L_GPIO_LED_USER, |
|
561 | .active_low = 1, |
556 | .active_low = 1, |
|
562 | .open_drain = 1, |
557 | .open_drain = 1, |
|
563 | }, |
558 | }, |
|
564 | }; |
559 | }; |
|
Line 565... | Line -... | |||
565 | |
- | ||
566 | /* RB 931-2nD gpios */ |
- | ||
567 | #define RB931_GPIO_BTN_RESET 0 |
- | ||
568 | #define RB931_GPIO_BTN_MODE 9 |
- | ||
569 | #define RB931_GPIO_LED_USER 1 |
- | ||
570 | |
- | ||
571 | static struct gpio_keys_button rb931_gpio_keys[] __initdata = { |
- | ||
572 | { |
- | ||
573 | .desc = "Reset button", |
- | ||
574 | .type = EV_KEY, |
- | ||
575 | .code = KEY_RESTART, |
- | ||
576 | .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, |
- | ||
577 | .gpio = RB931_GPIO_BTN_RESET, |
- | ||
578 | .active_low = 1, |
- | ||
579 | }, { |
- | ||
580 | .desc = "Mode button", |
- | ||
581 | .type = EV_KEY, |
- | ||
582 | .code = BTN_0, |
- | ||
583 | .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, |
- | ||
584 | .gpio = RB931_GPIO_BTN_MODE, |
- | ||
585 | .active_low = 1, |
- | ||
586 | } |
- | ||
587 | }; |
- | ||
588 | |
- | ||
589 | static struct gpio_led rb931_leds[] __initdata = { |
- | ||
590 | { |
- | ||
591 | .name = "rb:green:user", |
- | ||
592 | .gpio = RB931_GPIO_LED_USER, |
- | ||
593 | .active_low = 1, |
- | ||
594 | }, |
- | ||
595 | }; |
- | ||
596 | |
- | ||
597 | /* RB wAP R-2nD (wAP R) gpios*/ |
- | ||
598 | #define RBWAPR_GPIO_LED_USER 14 |
- | ||
599 | #define RBWAPR_GPIO_LED1 12 |
- | ||
600 | #define RBWAPR_GPIO_LED2 13 |
- | ||
601 | #define RBWAPR_GPIO_LED3 3 |
- | ||
602 | #define RBWAPR_GPIO_PCIE_PWROFF 15 |
- | ||
603 | #define RBWAPR_GPIO_CONTROL 10 |
- | ||
604 | #define RBWAPR_GPIO_BTN_RESET 16 |
- | ||
605 | |
- | ||
606 | static struct gpio_led rbwapr_leds[] __initdata = { |
- | ||
607 | { |
- | ||
608 | .name = "rb:green:user", |
- | ||
609 | .gpio = RBWAPR_GPIO_LED_USER, |
- | ||
610 | .active_low = 0, |
- | ||
611 | },{ |
- | ||
612 | .name = "rb:green:led1", |
- | ||
613 | .gpio = RBWAPR_GPIO_LED1, |
- | ||
614 | .active_low = 1, |
- | ||
615 | },{ |
- | ||
616 | .name = "rb:green:led2", |
- | ||
617 | .gpio = RBWAPR_GPIO_LED2, |
- | ||
618 | .active_low = 1, |
- | ||
619 | },{ |
- | ||
620 | .name = "rb:green:led3", |
- | ||
621 | .gpio = RBWAPR_GPIO_LED3, |
- | ||
622 | .active_low = 0, |
- | ||
623 | }, |
- | ||
624 | }; |
- | ||
625 | |
- | ||
626 | |
560 | |
|
627 | static struct gen_74x164_chip_platform_data rbspi_ssr_data = { |
561 | static struct gen_74x164_chip_platform_data rbspi_ssr_data = { |
|
628 | .base = RBSPI_SSR_GPIO_BASE, |
562 | .base = RBSPI_SSR_GPIO_BASE, |
|
629 | .num_registers = 1, |
563 | .num_registers = 1, |
|
Line 856... | Line 790... | |||
856 | * WLAN1 MAC IS HW MAC + 6 (hAP ac lite) |
790 | * WLAN1 MAC IS HW MAC + 6 (hAP ac lite) |
|
857 | */ |
791 | */ |
|
858 | rbspi_network_setup(flags, 1, 5, 6); |
792 | rbspi_network_setup(flags, 1, 5, 6); |
|
Line 859... | Line 793... | |||
859 | |
793 | |
|
860 | if (flags & RBSPI_HAS_USB) |
794 | if (flags & RBSPI_HAS_USB) |
|
861 | gpio_request_one(RB952_GPIO_USB_PWROFF, GPIOF_ACTIVE_LOW | |
795 | gpio_request_one(RB952_GPIO_USB_POWER, |
|
862 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
796 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
|
Line 863... | Line 797... | |||
863 | "USB power off"); |
797 | "USB power"); |
|
864 | |
798 | |
|
865 | if (flags & RBSPI_HAS_POE) |
799 | if (flags & RBSPI_HAS_POE) |
|
866 | gpio_request_one(RB952_GPIO_POE_POWER, |
800 | gpio_request_one(RB952_GPIO_POE_POWER, |
|
Line 966... | Line 900... | |||
966 | |
900 | |
|
967 | /* WLAN1 MAC is HW MAC + 7 */ |
901 | /* WLAN1 MAC is HW MAC + 7 */ |
|
Line 968... | Line 902... | |||
968 | rbspi_wlan_init(1, 7); |
902 | rbspi_wlan_init(1, 7); |
|
969 | |
903 | |
|
970 | if (flags & RBSPI_HAS_USB) |
904 | if (flags & RBSPI_HAS_USB) |
|
971 | gpio_request_one(RB962_GPIO_USB_PWROFF, GPIOF_ACTIVE_LOW | |
905 | gpio_request_one(RB962_GPIO_USB_POWER, |
|
Line 972... | Line 906... | |||
972 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
906 | GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
|
973 | "USB power off"); |
907 | "USB power"); |
|
974 | |
908 | |
|
975 | /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */ |
909 | /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */ |
|
Line 1075... | Line 1009... | |||
1075 | if (flags & RBSPI_HAS_POE) |
1009 | if (flags & RBSPI_HAS_POE) |
|
1076 | gpio_request_one(RBMAP_GPIO_POE_POWER, |
1010 | gpio_request_one(RBMAP_GPIO_POE_POWER, |
|
1077 | GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, |
1011 | GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, |
|
1078 | "POE power"); |
1012 | "POE power"); |
|
Line -... | Line 1013... | |||
- | 1013 | |
||
1079 | |
1014 | /* USB power GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */ |
|
1080 | if (flags & RBSPI_HAS_USB) |
1015 | if (flags & RBSPI_HAS_USB) |
|
1081 | gpio_request_one(RBMAP_GPIO_USB_PWROFF, |
1016 | gpio_request_one(RBMAP_GPIO_USB_POWER, |
|
1082 | GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW | |
1017 | GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW | |
|
1083 | GPIOF_EXPORT_DIR_FIXED, |
1018 | GPIOF_EXPORT_DIR_FIXED, |
|
Line 1084... | Line 1019... | |||
1084 | "USB power off"); |
1019 | "USB power"); |
|
Line 1085... | Line 1020... | |||
1085 | |
1020 | |
|
1086 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds); |
1021 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds); |
|
Line 1171... | Line 1106... | |||
1171 | ath79_gpio_output_select(RB911L_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO); |
1106 | ath79_gpio_output_select(RB911L_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO); |
|
Line 1172... | Line 1107... | |||
1172 | |
1107 | |
|
1173 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds), rb911l_leds); |
1108 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds), rb911l_leds); |
|
Line 1174... | Line -... | |||
1174 | } |
- | ||
1175 | |
- | ||
1176 | /* |
- | ||
1177 | * Init the hAP mini hardware (QCA953x). |
- | ||
1178 | * The 931-2nD (hAP mini) has 3 ethernet ports, with port 2-3 |
- | ||
1179 | * being assigned to LAN on the casing, and port 1 being assigned |
- | ||
1180 | * to "internet" (WAN) on the casing. Port 1 is connected to PHY2. |
- | ||
1181 | * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device. |
- | ||
1182 | */ |
- | ||
1183 | static void __init rb931_setup(void) |
- | ||
1184 | { |
- | ||
1185 | u32 flags = RBSPI_HAS_WLAN0; |
- | ||
1186 | |
- | ||
1187 | if (!rbspi_platform_setup()) |
- | ||
1188 | return; |
- | ||
1189 | |
- | ||
1190 | rbspi_peripherals_setup(flags); |
- | ||
1191 | |
- | ||
1192 | /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 3 */ |
- | ||
1193 | rbspi_network_setup(flags, 0, 3, 0); |
- | ||
1194 | |
- | ||
1195 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rb931_leds), rb931_leds); |
- | ||
1196 | |
- | ||
1197 | /* hAP mini has two buttons */ |
- | ||
1198 | ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, |
- | ||
1199 | ARRAY_SIZE(rb931_gpio_keys), |
- | ||
1200 | rb931_gpio_keys); |
- | ||
1201 | } |
- | ||
1202 | |
- | ||
1203 | /* |
- | ||
1204 | * Init the wAP R hardware. |
- | ||
1205 | * The wAP R-2nD has a single ethernet port and a mini PCIe slot. |
- | ||
1206 | * The OEM source shows it has usb (used over PCIe for LTE devices), |
- | ||
1207 | * and the 'control' GPIO is assumed to be an output pin not tied to an LED. |
- | ||
1208 | */ |
- | ||
1209 | static void __init rbwapr_setup(void) |
- | ||
1210 | { |
- | ||
1211 | u32 flags = RBSPI_HAS_WLAN0 | RBSPI_HAS_USB | RBSPI_HAS_PCI; |
- | ||
1212 | |
- | ||
1213 | if (!rbspi_platform_setup()) |
- | ||
1214 | return; |
- | ||
1215 | |
- | ||
1216 | rbspi_peripherals_setup(flags); |
- | ||
1217 | |
- | ||
1218 | /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */ |
- | ||
1219 | rbspi_network_setup(flags, 0, 1, 0); |
- | ||
1220 | |
- | ||
1221 | ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapr_leds), rbwapr_leds); |
- | ||
1222 | |
- | ||
1223 | gpio_request_one(RBWAPR_GPIO_PCIE_PWROFF, GPIOF_OUT_INIT_HIGH | |
- | ||
1224 | GPIOF_ACTIVE_LOW | GPIOF_EXPORT_DIR_FIXED, |
- | ||
1225 | "PCIE power off"); |
- | ||
1226 | |
- | ||
1227 | gpio_request_one(RBWAPR_GPIO_CONTROL, GPIOF_OUT_INIT_LOW | |
- | ||
1228 | GPIOF_ACTIVE_LOW | GPIOF_EXPORT_DIR_FIXED, |
- | ||
1229 | "control"); |
- | ||
1230 | |
- | ||
1231 | rbspi_register_reset_button(RBWAPR_GPIO_BTN_RESET); |
- | ||
1232 | } |
1109 | } |
|
1233 | |
1110 | |
|
1234 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup); |
1111 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup); |
|
1235 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup); |
1112 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup); |
|
1236 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_911L, "911L", rb911l_setup); |
1113 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_911L, "911L", rb911l_setup); |
|
1237 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup); |
1114 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup); |
|
1238 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_962, "962", rb962_setup); |
1115 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_962, "962", rb962_setup); |
|
1239 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup); |
1116 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup); |
|
1240 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5, "lhg", rblhg_setup); |
- | ||
1241 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup); |
1117 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5, "lhg", rblhg_setup); |
|
1242 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPR, "wap-lte", rbwapr_setup); |
1118 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup); |
|
1243 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP, "cap-hb", rbcap_setup); |
1119 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP, "cap-hb", rbcap_setup); |
|
1244 | MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP, "map2-hb", rbmap_setup); |
- |