OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 104... Line 104...
104 cap324_leds_gpio); 104 cap324_leds_gpio);
105 ath79_register_gpio_keys_polled(-1, CAP324_KEYS_POLL_INTERVAL, 105 ath79_register_gpio_keys_polled(-1, CAP324_KEYS_POLL_INTERVAL,
106 ARRAY_SIZE(cap324_gpio_keys), 106 ARRAY_SIZE(cap324_gpio_keys),
107 cap324_gpio_keys); 107 cap324_gpio_keys);
Line 108... Line 108...
108   108  
109 ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -2); 109 ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -1);
110 ath79_wmac_disable_2ghz(); 110 ath79_wmac_disable_2ghz();
Line 111... Line 111...
111 ath79_register_wmac(art + CAP324_WMAC_CALDATA_OFFSET, mac); 111 ath79_register_wmac(art + CAP324_WMAC_CALDATA_OFFSET, mac);
112   112  
Line 113... Line 113...
113 ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -1); 113 ath79_init_mac(mac, art + CAP324_MAC_OFFSET, -2);
114 ap91_pci_init(art + CAP324_PCIE_CALDATA_OFFSET, mac); 114 ap91_pci_init(art + CAP324_PCIE_CALDATA_OFFSET, mac);
Line 115... Line 115...
115   115  
Line 116... Line 116...
116 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | 116 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
117 AR934X_ETH_CFG_SW_ONLY_MODE); 117 AR934X_ETH_CFG_SW_ONLY_MODE);
Line 118... Line 118...
118   118  
119 ath79_register_mdio(0, 0x0); 119 ath79_register_mdio(0, 0x0);
120   120  
121 ath79_init_mac(ath79_eth0_data.mac_addr, 121 ath79_init_mac(ath79_eth0_data.mac_addr,
122 art + CAP324_MAC_OFFSET, 0); 122 art + CAP324_MAC_OFFSET, -2);
123   123  
124 /* GMAC0 is connected to an external PHY */ 124 /* GMAC0 is connected to an external PHY */
Line 125... Line 125...
125 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; 125 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
126 ath79_eth0_data.phy_mask = BIT(0); 126 ath79_eth0_data.phy_mask = BIT(0);