OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 12... Line 12...
12 * up to 1152MHz: mul=3, div=2 (unchanged) 12 * up to 1152MHz: mul=3, div=2 (unchanged)
13 * above 1152MHz: mul=4, div=2 (was: mul=2, div=1) 13 * above 1152MHz: mul=4, div=2 (was: mul=2, div=1)
Line 14... Line 14...
14   14  
15 --- a/arch/arm/mach-sunxi/clock_sun6i.c 15 --- a/arch/arm/mach-sunxi/clock_sun6i.c
16 +++ b/arch/arm/mach-sunxi/clock_sun6i.c 16 +++ b/arch/arm/mach-sunxi/clock_sun6i.c
17 @@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk) 17 @@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk)
18 struct sunxi_ccm_reg * const ccm = 18 struct sunxi_ccm_reg * const ccm =
19 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; 19 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
20 const int p = 0; 20 const int p = 0;
21 - int k = 1; 21 - int k = 1;