OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 114... Line 114...
114 ret = nor->flash_unlock(nor, ofs, len); 114 ret = nor->flash_unlock(nor, ofs, len);
115 + spi_nor_check_ext_addr(nor, 0); 115 + spi_nor_check_ext_addr(nor, 0);
Line 116... Line 116...
116 116
117 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK); 117 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_LOCK);
118 return ret; 118 return ret;
119 @@ -1177,7 +1229,7 @@ static const struct flash_info spi_nor_i 119 @@ -1164,7 +1216,7 @@ static const struct flash_info spi_nor_i
120 { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, 120 { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
121 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, 121 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
122 { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, 122 { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
123 - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 123 - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
124 + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_READ_OP) }, 124 + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_READ_OP) },
125 { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, 125 { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,
Line 126... Line 126...
126 SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, 126 SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },
127 127
128 @@ -1237,6 +1289,9 @@ static int spi_nor_read(struct mtd_info 128 @@ -1224,6 +1276,9 @@ static int spi_nor_read(struct mtd_info
Line 129... Line 129...
129 if (ret) 129 if (ret)
130 return ret; 130 return ret;
131 131
132 + if (nor->flags & SNOR_F_4B_EXT_ADDR) 132 + if (nor->flags & SNOR_F_4B_EXT_ADDR)
133 + nor->addr_width = 4; 133 + nor->addr_width = 4;
Line 134... Line 134...
134 + 134 +
135 while (len) { 135 while (len) {
Line 136... Line 136...
136 loff_t addr = from; 136 loff_t addr = from;
137 137
138 @@ -1261,6 +1316,18 @@ static int spi_nor_read(struct mtd_info 138 @@ -1248,6 +1303,18 @@ static int spi_nor_read(struct mtd_info
Line 152... Line 152...
152 + } 152 + }
153 + 153 +
154 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ); 154 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
155 return ret; 155 return ret;
156 } 156 }
157 @@ -1362,6 +1429,10 @@ static int spi_nor_write(struct mtd_info 157 @@ -1349,6 +1416,10 @@ static int spi_nor_write(struct mtd_info
158 if (ret) 158 if (ret)
159 return ret; 159 return ret;
Line 160... Line 160...
160 160
161 + ret = spi_nor_check_ext_addr(nor, to + len); 161 + ret = spi_nor_check_ext_addr(nor, to + len);
162 + if (ret < 0) 162 + if (ret < 0)
163 + return ret; 163 + return ret;
164 + 164 +
165 for (i = 0; i < len; ) { 165 for (i = 0; i < len; ) {
166 ssize_t written; 166 ssize_t written;
167 loff_t addr = to + i; 167 loff_t addr = to + i;
168 @@ -1402,6 +1473,7 @@ static int spi_nor_write(struct mtd_info 168 @@ -1389,6 +1460,7 @@ static int spi_nor_write(struct mtd_info
Line 169... Line 169...
169 } 169 }
170 170
171 write_err: 171 write_err:
172 + spi_nor_check_ext_addr(nor, 0); 172 + spi_nor_check_ext_addr(nor, 0);
173 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); 173 spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
174 return ret; 174 return ret;
175 } 175 }
176 @@ -2818,8 +2890,10 @@ int spi_nor_scan(struct spi_nor *nor, co 176 @@ -2805,8 +2877,10 @@ int spi_nor_scan(struct spi_nor *nor, co
177 } else if (mtd->size > 0x1000000) { 177 } else if (mtd->size > 0x1000000) {
178 /* enable 4-byte addressing if the device exceeds 16MiB */ 178 /* enable 4-byte addressing if the device exceeds 16MiB */
179 nor->addr_width = 4; 179 nor->addr_width = 4;