OpenWrt – Diff between revs 2 and 3
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| Rev 2 | Rev 3 | |||
|---|---|---|---|---|
| Line 1... | Line 1... | |||
| 1 | / { |
1 | / { |
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| 2 | #address-cells = <1>; |
2 | #address-cells = <1>; |
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| 3 | #size-cells = <1>; |
3 | #size-cells = <1>; |
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| 4 | compatible = "mediatek,mt7628an-soc"; |
4 | compatible = "ralink,mtk7628an-soc"; |
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| Line 5... | Line 5... | |||
| 5 | |
5 | |
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| 6 | cpus { |
- | ||
| 7 | #address-cells = <1>; |
- | ||
| 8 | #size-cells = <0>; |
- | ||
| 9 | |
6 | cpus { |
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| 10 | cpu@0 { |
7 | cpu@0 { |
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| 11 | compatible = "mips,mips24KEc"; |
- | ||
| 12 | reg = <0>; |
8 | compatible = "mips,mips24KEc"; |
|
| 13 | }; |
9 | }; |
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| Line 14... | Line 10... | |||
| 14 | }; |
10 | }; |
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| 15 | |
11 | |
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| Line 19... | Line 15... | |||
| 19 | |
15 | |
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| 20 | aliases { |
16 | aliases { |
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| 21 | serial0 = &uartlite; |
17 | serial0 = &uartlite; |
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| Line 22... | Line 18... | |||
| 22 | }; |
18 | }; |
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| 23 | |
19 | |
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| 24 | cpuintc: cpuintc { |
20 | cpuintc: cpuintc@0 { |
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| 25 | #address-cells = <0>; |
21 | #address-cells = <0>; |
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| 26 | #interrupt-cells = <1>; |
22 | #interrupt-cells = <1>; |
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| 27 | interrupt-controller; |
23 | interrupt-controller; |
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| Line 279... | Line 275... | |||
| 279 | pinctrl-0 = <&state_default>; |
275 | pinctrl-0 = <&state_default>; |
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| Line 280... | Line 276... | |||
| 280 | |
276 | |
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| 281 | state_default: pinctrl0 { |
277 | state_default: pinctrl0 { |
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| Line 282... | Line 278... | |||
| 282 | }; |
278 | }; |
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| 283 | |
279 | |
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| 284 | spi_pins: spi_pins { |
280 | spi_pins: spi { |
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| 285 | spi_pins { |
281 | spi { |
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| 286 | ralink,group = "spi"; |
282 | ralink,group = "spi"; |
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| 287 | ralink,function = "spi"; |
283 | ralink,function = "spi"; |
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| Line 293... | Line 289... | |||
| 293 | ralink,group = "spi cs1"; |
289 | ralink,group = "spi cs1"; |
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| 294 | ralink,function = "spi cs1"; |
290 | ralink,function = "spi cs1"; |
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| 295 | }; |
291 | }; |
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| 296 | }; |
292 | }; |
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| Line 297... | Line 293... | |||
| 297 | |
293 | |
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| 298 | i2c_pins: i2c_pins { |
294 | i2c_pins: i2c { |
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| 299 | i2c_pins { |
295 | i2c { |
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| 300 | ralink,group = "i2c"; |
296 | ralink,group = "i2c"; |
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| 301 | ralink,function = "i2c"; |
297 | ralink,function = "i2c"; |
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| 302 | }; |
298 | }; |
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| Line 400... | Line 396... | |||
| 400 | |
396 | |
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| 401 | status = "disabled"; |
397 | status = "disabled"; |
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| Line 402... | Line 398... | |||
| 402 | }; |
398 | }; |
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| 403 | |
- | ||
| 404 | ehci: ehci@101c0000 { |
- | ||
| 405 | #address-cells = <1>; |
399 | |
|
| 406 | #size-cells = <0>; |
400 | ehci: ehci@101c0000 { |
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| Line 407... | Line 401... | |||
| 407 | compatible = "generic-ehci"; |
401 | compatible = "generic-ehci"; |
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| 408 | reg = <0x101c0000 0x1000>; |
402 | reg = <0x101c0000 0x1000>; |
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| Line 409... | Line 403... | |||
| 409 | |
403 | |
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| 410 | phys = <&usbphy>; |
404 | phys = <&usbphy>; |
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| 411 | phy-names = "usb"; |
- | ||
| 412 | |
- | ||
| 413 | interrupt-parent = <&intc>; |
- | ||
| 414 | interrupts = <18>; |
- | ||
| 415 | |
- | ||
| 416 | ehci_port1: port@1 { |
405 | phy-names = "usb"; |
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| Line 417... | Line 406... | |||
| 417 | reg = <1>; |
406 | |
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| 418 | #trigger-source-cells = <0>; |
- | ||
| 419 | }; |
- | ||
| 420 | }; |
407 | interrupt-parent = <&intc>; |
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| 421 | |
408 | interrupts = <18>; |
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| Line 422... | Line 409... | |||
| 422 | ohci: ohci@101c1000 { |
409 | }; |
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| 423 | #address-cells = <1>; |
410 | |
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| Line 424... | Line 411... | |||
| 424 | #size-cells = <0>; |
411 | ohci: ohci@101c1000 { |
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| 425 | compatible = "generic-ohci"; |
412 | compatible = "generic-ohci"; |
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| 426 | reg = <0x101c1000 0x1000>; |
- | ||
| 427 | |
- | ||
| 428 | phys = <&usbphy>; |
- | ||
| 429 | phy-names = "usb"; |
- | ||
| 430 | |
- | ||
| 431 | interrupt-parent = <&intc>; |
413 | reg = <0x101c1000 0x1000>; |
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| Line 432... | Line 414... | |||
| 432 | interrupts = <18>; |
414 | |
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| 433 | |
415 | phys = <&usbphy>; |
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| 434 | ohci_port1: port@1 { |
416 | phy-names = "usb"; |
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| Line 485... | Line 467... | |||
| 485 | ranges = < |
467 | ranges = < |
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| 486 | 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ |
468 | 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ |
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| 487 | 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ |
469 | 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ |
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| 488 | >; |
470 | >; |
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| Line 489... | Line 471... | |||
| 489 | |
471 | |
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| 490 | pcie0: pcie@0,0 { |
472 | pcie-bridge { |
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| Line 491... | Line 473... | |||
| 491 | reg = <0x0000 0 0 0 0>; |
473 | reg = <0x0000 0 0 0 0>; |
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| 492 | |
474 | |
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| Line 493... | Line 475... | |||
| 493 | #address-cells = <3>; |
475 | #address-cells = <3>; |
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| 494 | #size-cells = <2>; |
- | ||
| 495 | |
- | ||
| 496 | device_type = "pci"; |
476 | #size-cells = <2>; |
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| 497 | |
477 | |
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| Line 498... | Line 478... | |||
| 498 | ranges; |
478 | device_type = "pci"; |
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| 499 | }; |
479 | }; |
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