OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 4... Line 4...
4 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/input.h>
Line 5... Line 5...
5   5  
6 / { 6 / {
Line 7... Line -...
7 compatible = "zbtlink,zbt-wg3526", "mediatek,mt7621-soc"; -  
8   -  
9 aliases { -  
10 led-boot = &led_status; -  
11 led-failsafe = &led_status; -  
12 led-running = &led_status; -  
13 led-upgrade = &led_status; -  
14 }; 7 compatible = "zbtlink,zbt-wg3526", "mediatek,mt7621-soc";
15   8  
16 memory@0 { 9 memory@0 {
17 device_type = "memory"; 10 device_type = "memory";
Line 26... Line 19...
26 i2c@900 { 19 i2c@900 {
27 status = "okay"; 20 status = "okay";
28 }; 21 };
29 }; 22 };
Line 30... Line 23...
30   23  
31 keys { 24 gpio-keys-polled {
-   25 compatible = "gpio-keys-polled";
-   26 #address-cells = <1>;
32 compatible = "gpio-keys-polled"; 27 #size-cells = <0>;
Line 33... Line 28...
33 poll-interval = <20>; 28 poll-interval = <20>;
34   29  
35 reset { 30 reset {
36 label = "reset"; 31 label = "reset";
37 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 32 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_RESTART>; 33 linux,code = <KEY_RESTART>;
Line 39... Line 34...
39 }; 34 };
40 }; 35 };
Line 41... Line 36...
41   36  
42 leds { 37 gpio-leds {
43 compatible = "gpio-leds"; 38 compatible = "gpio-leds";
44   39  
45 led_status: status { 40 status {
46 label = "zbt-wg3526:green:status"; 41 label = "zbt-wg3526:green:status";
Line 55... Line 50...
55   50  
56 &spi0 { 51 &spi0 {
Line 57... Line 52...
57 status = "okay"; 52 status = "okay";
-   53  
-   54 m25p80@0 {
58   55 #address-cells = <1>;
59 m25p80@0 { 56 #size-cells = <1>;
60 compatible = "jedec,spi-nor"; 57 compatible = "jedec,spi-nor";
-   58 reg = <0>;
-   59 spi-max-frequency = <10000000>;
-   60 m25p,chunked-io = <32>;
-   61  
-   62 partition@0 {
-   63 label = "u-boot";
-   64 reg = <0x0 0x30000>;
-   65 read-only;
-   66 };
-   67  
-   68 partition@30000 {
-   69 label = "u-boot-env";
-   70 reg = <0x30000 0x10000>;
Line 61... Line -...
61 reg = <0>; -  
62 spi-max-frequency = <10000000>; -  
63   -  
64 partitions { -  
65 compatible = "fixed-partitions"; -  
66 #address-cells = <1>; -  
67 #size-cells = <1>; -  
68   -  
69 partition@0 { -  
70 label = "u-boot"; -  
71 reg = <0x0 0x30000>; -  
72 read-only; -  
73 }; -  
74   -  
75 partition@30000 { -  
76 label = "u-boot-env"; -  
77 reg = <0x30000 0x10000>; -  
78 read-only; 71 read-only;
79 }; 72 };
80   73  
81 factory: partition@40000 { 74 factory: partition@40000 {
82 label = "factory"; 75 label = "factory";
83 reg = <0x40000 0x10000>; 76 reg = <0x40000 0x10000>;
84 read-only; 77 read-only;
85 }; -  
86   78 };
87 firmware: partition@50000 { -  
88 compatible = "denx,uimage"; 79  
89 label = "firmware"; 80 firmware: partition@50000 {
90 }; 81 label = "firmware";
Line 91... Line 82...
91 }; 82 };
92 }; 83 };
93 }; -  
Line 94... Line 84...
94   84 };
95 &pcie { 85  
96 status = "okay"; 86 &pcie {
97 }; 87 status = "okay";
98   88  
-   89 pcie0 {
99 &pcie0 { 90 wifi@14c3,7603 {
100 wifi@0,0 { -  
101 compatible = "pci14c3,7603"; -  
102 reg = <0x0000 0 0 0 0>; -  
103 mediatek,mtd-eeprom = <&factory 0x0000>; -  
104 }; -  
105 }; -  
106   -  
107 &pcie1 { -  
Line 108... Line 91...
108 wifi@0,0 { 91 compatible = "pci14c3,7603";
-   92 reg = <0x0000 0 0 0 0>;
-   93 mediatek,mtd-eeprom = <&factory 0x0000>;
109 compatible = "pci14c3,7662"; 94 };
-   95 };
-   96  
110 reg = <0x0000 0 0 0 0>; 97 pcie1 {
111 mediatek,mtd-eeprom = <&factory 0x8000>; 98 wifi@14c3,7662 {
112 ieee80211-freq-limit = <5000000 6000000>; 99 compatible = "pci14c3,7662";
Line 113... Line 100...
113   100 reg = <0x0000 0 0 0 0>;