OpenWrt – Diff between revs 2 and 3
?pathlinks?
| Rev 2 | Rev 3 | |||
|---|---|---|---|---|
| Line 7... | Line 7... | |||
| 7 | |
7 | |
|
| 8 | / { |
8 | / { |
|
| 9 | compatible = "trendnet,tew-692gr", "ralink,rt3883-soc"; |
9 | compatible = "trendnet,tew-692gr", "ralink,rt3883-soc"; |
|
| Line 10... | Line -... | |||
| 10 | model = "TRENDnet TEW-692GR"; |
- | ||
| 11 | |
- | ||
| 12 | aliases { |
- | ||
| 13 | led-boot = &led_wps_green; |
- | ||
| 14 | led-failsafe = &led_wps_green; |
- | ||
| 15 | led-running = &led_wps_green; |
- | ||
| 16 | led-upgrade = &led_wps_green; |
- | ||
| 17 | }; |
10 | model = "TRENDnet TEW-692GR"; |
|
| 18 | |
11 | |
|
| 19 | nor-flash@1c000000 { |
12 | nor-flash@1c000000 { |
|
| 20 | compatible = "cfi-flash"; |
13 | compatible = "cfi-flash"; |
|
| - | 14 | reg = <0x1c000000 0x800000>; |
||
| - | 15 | bank-width = <2>; |
||
| Line 21... | Line -... | |||
| 21 | reg = <0x1c000000 0x800000>; |
- | ||
| 22 | bank-width = <2>; |
- | ||
| 23 | |
- | ||
| 24 | partitions { |
- | ||
| 25 | compatible = "fixed-partitions"; |
- | ||
| 26 | #address-cells = <1>; |
16 | #address-cells = <1>; |
|
| 27 | #size-cells = <1>; |
17 | #size-cells = <1>; |
|
| 28 | |
18 | |
|
| 29 | partition@0 { |
19 | partition@0 { |
|
| 30 | reg = <0x0 0x0030000>; |
20 | reg = <0x0 0x0030000>; |
|
| Line 31... | Line 21... | |||
| 31 | label = "u-boot"; |
21 | label = "u-boot"; |
|
| 32 | read-only; |
22 | read-only; |
|
| 33 | }; |
23 | }; |
|
| 34 | |
24 | |
|
| 35 | partition@30000 { |
25 | partition@30000 { |
|
| Line 36... | Line 26... | |||
| 36 | reg = <0x00030000 0x00010000>; |
26 | reg = <0x00030000 0x00010000>; |
|
| 37 | label = "u-boot-env"; |
27 | label = "u-boot-env"; |
|
| 38 | read-only; |
28 | read-only; |
|
| 39 | }; |
29 | }; |
|
| 40 | |
30 | |
|
| Line 41... | Line 31... | |||
| 41 | factory: partition@40000 { |
31 | factory: partition@40000 { |
|
| 42 | reg = <0x00040000 0x00010000>; |
- | ||
| 43 | label = "factory"; |
32 | reg = <0x00040000 0x00010000>; |
|
| 44 | read-only; |
33 | label = "factory"; |
|
| 45 | }; |
- | ||
| 46 | |
34 | read-only; |
|
| 47 | partition@50000 { |
35 | }; |
|
| Line 48... | Line 36... | |||
| 48 | compatible = "denx,uimage"; |
36 | |
|
| 49 | reg = <0x00050000 0x007b0000>; |
37 | partition@50000 { |
|
| - | 38 | reg = <0x00050000 0x007b0000>; |
||
| - | 39 | label = "firmware"; |
||
| 50 | label = "firmware"; |
40 | }; |
|
| Line 51... | Line 41... | |||
| 51 | }; |
41 | }; |
|
| 52 | }; |
42 | |
|
| 53 | }; |
43 | gpio-keys-polled { |
|
| Line 67... | Line 57... | |||
| 67 | gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; |
57 | gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; |
|
| 68 | linux,code = <KEY_WPS_BUTTON>; |
58 | linux,code = <KEY_WPS_BUTTON>; |
|
| 69 | }; |
59 | }; |
|
| 70 | }; |
60 | }; |
|
| Line 71... | Line 61... | |||
| 71 | |
61 | |
|
| 72 | leds { |
62 | gpio-leds { |
|
| Line 73... | Line 63... | |||
| 73 | compatible = "gpio-leds"; |
63 | compatible = "gpio-leds"; |
|
| 74 | |
64 | |
|
| 75 | wps { |
65 | wps { |
|
| 76 | label = "tew-692gr:orange:wps"; |
66 | label = "tew-692gr:orange:wps"; |
|
| Line 77... | Line 67... | |||
| 77 | gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; |
67 | gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; |
|
| 78 | }; |
68 | }; |
|
| 79 | |
69 | |
|
| 80 | led_wps_green: wps2 { |
70 | wps2 { |
|
| 81 | label = "tew-692gr:green:wps"; |
71 | label = "tew-692gr:green:wps"; |
|
| 82 | gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
72 | gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
|
| Line 128... | Line 118... | |||
| 128 | }; |
118 | }; |
|
| 129 | }; |
119 | }; |
|
| Line 130... | Line 120... | |||
| 130 | |
120 | |
|
| 131 | &pci { |
121 | &pci { |
|
| - | 122 | status = "okay"; |
||
| 132 | status = "okay"; |
123 | pinctrl-names = "default"; |
|
| Line -... | Line 124... | |||
| - | 124 | pinctrl-0 = <&pci_pins>; |
||
| 133 | }; |
125 | |
|
| - | 126 | pci_pins: pci { |
||
| - | 127 | pci { |
||
| - | 128 | ralink,group = "pci"; |
||
| - | 129 | ralink,function = "pci-fnc"; |
||
| - | 130 | }; |
||
| - | 131 | }; |
||
| - | 132 | |
||
| 134 | |
133 | host-bridge { |
|
| Line 135... | Line 134... | |||
| 135 | &pci1 { |
134 | pci-bridge@1 { |
|
| 136 | status = "okay"; |
135 | status = "okay"; |
|
| 137 | |
136 | |
|
| 138 | wifi@0,0 { |
137 | wifi@0,0 { |
|
| - | 138 | compatible = "pci0,0"; |
||
| - | 139 | reg = < 0x10000 0 0 0 0 >; |
||
| 139 | compatible = "pci0,0"; |
140 | ralink,2ghz = <0>; |
|
| 140 | reg = < 0x10000 0 0 0 0 >; |
141 | }; |
|
| Line 141... | Line 142... | |||
| 141 | ralink,2ghz = <0>; |
142 | }; |
|
| 142 | }; |
143 | }; |
|