OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 7... Line 7...
7   7  
8 / { 8 / {
9 compatible = "xiaomi,miwifi-mini", "ralink,mt7620a-soc"; 9 compatible = "xiaomi,miwifi-mini", "ralink,mt7620a-soc";
Line 10... Line -...
10 model = "Xiaomi MiWiFi Mini"; -  
11   -  
12 aliases { -  
13 led-boot = &led_blue; -  
14 led-failsafe = &led_blue; -  
15 led-running = &led_blue; -  
16 led-upgrade = &led_blue; -  
17 }; 10 model = "Xiaomi MiWiFi Mini";
18   11  
19 chosen { 12 chosen {
Line 20... Line 13...
20 bootargs = "console=ttyS0,115200"; 13 bootargs = "console=ttyS0,115200";
21 }; 14 };
Line 22... Line 15...
22   15  
23 leds { 16 gpio-leds {
24 compatible = "gpio-leds"; 17 compatible = "gpio-leds";
25   -  
26 led_blue: blue { 18  
Line 27... Line 19...
27 label = "miwifi-mini:blue:status"; 19 blue {
28 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 20 label = "miwifi-mini:blue:status";
29 default-state = "on"; 21 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
Line 38... Line 30...
38 label = "miwifi-mini:red:status"; 30 label = "miwifi-mini:red:status";
39 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 31 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
40 }; 32 };
41 }; 33 };
Line 42... Line 34...
42   34  
43 keys { 35 gpio-keys-polled {
-   36 compatible = "gpio-keys-polled";
-   37 #address-cells = <1>;
44 compatible = "gpio-keys-polled"; 38 #size-cells = <0>;
Line 45... Line 39...
45 poll-interval = <20>; 39 poll-interval = <20>;
46   40  
47 reset { 41 reset {
Line 66... Line 60...
66   60  
67 &spi0 { 61 &spi0 {
Line 68... Line 62...
68 status = "okay"; 62 status = "okay";
-   63  
-   64 m25p80@0 {
69   65 #address-cells = <1>;
70 m25p80@0 { 66 #size-cells = <1>;
71 compatible = "jedec,spi-nor"; 67 compatible = "jedec,spi-nor";
Line 72... Line -...
72 reg = <0>; -  
73 spi-max-frequency = <10000000>; -  
74   -  
75 partitions { -  
76 compatible = "fixed-partitions"; -  
77 #address-cells = <1>; 68 reg = <0>;
78 #size-cells = <1>; 69 spi-max-frequency = <10000000>;
79   70  
80 partition@0 { 71 partition@0 {
81 label = "u-boot"; 72 label = "u-boot";
82 reg = <0x0 0x30000>; 73 reg = <0x0 0x30000>;
83 }; 74 };
84   75  
85 partition@30000 { 76 partition@30000 {
86 label = "u-boot-env"; 77 label = "u-boot-env";
87 reg = <0x30000 0x10000>; 78 reg = <0x30000 0x10000>;
88 read-only; 79 read-only;
89 }; 80 };
90   81  
91 factory: partition@40000 { 82 factory: partition@40000 {
92 label = "factory"; 83 label = "factory";
93 reg = <0x40000 0x10000>; 84 reg = <0x40000 0x10000>;
94 read-only; 85 read-only;
95 }; -  
96   86 };
97 partition@50000 { 87  
98 compatible = "denx,uimage"; 88 partition@50000 {
99 label = "firmware"; 89 label = "firmware";
100 reg = <0x50000 0xf80000>; 90 reg = <0x50000 0xf80000>;
101 }; 91 };
102   92  
103 partition@fd0000 { 93 partition@fd0000 {
104 label = "crash"; 94 label = "crash";
105 reg = <0xfd0000 0x10000>; 95 reg = <0xfd0000 0x10000>;
106 }; 96 };
107   97  
108 partition@fe0000 { 98 partition@fe0000 {
109 label = "reserved"; 99 label = "reserved";
110 reg = <0xfe0000 0x10000>; 100 reg = <0xfe0000 0x10000>;
111 read-only; 101 read-only;
112 }; 102 };
113   103  
114 partition@ff0000 { -  
115 label = "Bdata"; 104 partition@ff0000 {
116 reg = <0xff0000 0x10000>; 105 label = "Bdata";
117 }; 106 reg = <0xff0000 0x10000>;
Line 118... Line 107...
118 }; 107 };
Line 140... Line 129...
140 pinctrl-0 = <&pa_pins>; 129 pinctrl-0 = <&pa_pins>;
141 }; 130 };
Line 142... Line 131...
142   131  
143 &pcie { 132 &pcie {
144 status = "okay"; -  
Line 145... Line 133...
145 }; 133 status = "okay";
146   134  
147 &pcie0 { 135 pcie-bridge {
-   136 mt76@0,0 {
148 mt76@0,0 { 137 reg = <0x0000 0 0 0 0>;
149 reg = <0x0000 0 0 0 0>; 138 device_type = "pci";
-   139 mediatek,mtd-eeprom = <&factory 0x8000>;
150 mediatek,mtd-eeprom = <&factory 0x8000>; 140 ieee80211-freq-limit = <5000000 6000000>;
151 ieee80211-freq-limit = <5000000 6000000>; 141 };
Line 152... Line 142...
152 }; 142 };
153 }; 143 };