OpenWrt – Diff between revs 2 and 3
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Rev 2 | Rev 3 | |||
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Line 8... | Line 8... | |||
8 | / { |
8 | / { |
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9 | compatible = "phicomm,k2g", "ralink,mt7620a-soc"; |
9 | compatible = "phicomm,k2g", "ralink,mt7620a-soc"; |
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10 | model = "Phicomm K2G"; |
10 | model = "Phicomm K2G"; |
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Line 11... | Line 11... | |||
11 | |
11 | |
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12 | aliases { |
- | ||
13 | led-boot = &led_blue; |
- | ||
14 | led-failsafe = &led_blue; |
- | ||
15 | led-running = &led_blue; |
- | ||
16 | led-upgrade = &led_blue; |
12 | aliases { |
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17 | serial0 = &uartlite; |
13 | serial0 = &uartlite; |
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Line 18... | Line 14... | |||
18 | }; |
14 | }; |
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19 | |
15 | |
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Line 20... | Line 16... | |||
20 | leds { |
16 | gpio-leds { |
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21 | compatible = "gpio-leds"; |
17 | compatible = "gpio-leds"; |
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22 | |
18 | |
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Line 34... | Line 30... | |||
34 | label = "k2g:red:status"; |
30 | label = "k2g:red:status"; |
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35 | gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; |
31 | gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; |
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36 | }; |
32 | }; |
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37 | }; |
33 | }; |
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Line 38... | Line 34... | |||
38 | |
34 | |
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39 | keys { |
35 | gpio-keys-polled { |
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- | 36 | compatible = "gpio-keys-polled"; |
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- | 37 | #address-cells = <1>; |
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40 | compatible = "gpio-keys-polled"; |
38 | #size-cells = <0>; |
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Line 41... | Line 39... | |||
41 | poll-interval = <20>; |
39 | poll-interval = <20>; |
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42 | |
40 | |
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43 | reset { |
41 | reset { |
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Line 50... | Line 48... | |||
50 | |
48 | |
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51 | &spi0 { |
49 | &spi0 { |
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Line 52... | Line 50... | |||
52 | status = "okay"; |
50 | status = "okay"; |
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- | 51 | |
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- | 52 | m25p80@0 { |
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53 | |
53 | #address-cells = <1>; |
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54 | m25p80@0 { |
54 | #size-cells = <1>; |
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55 | compatible = "jedec,spi-nor"; |
55 | compatible = "jedec,spi-nor"; |
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Line 56... | Line 56... | |||
56 | reg = <0>; |
56 | reg = <0>; |
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57 | spi-max-frequency = <24000000>; |
57 | spi-max-frequency = <24000000>; |
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58 | |
58 | |
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59 | partitions { |
59 | partitions { |
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Line 60... | Line 60... | |||
60 | compatible = "fixed-partitions"; |
60 | compatible = "fixed-partitions"; |
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61 | #address-cells = <1>; |
61 | #address-cells = <1>; |
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62 | #size-cells = <1>; |
- | ||
63 | |
62 | #size-cells = <1>; |
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64 | partition@0 { |
63 | |
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Line 65... | Line 64... | |||
65 | reg = <0x0 0x30000>; |
64 | u-boot@0 { |
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66 | label = "u-boot"; |
65 | reg = <0x0 0x30000>; |
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67 | read-only; |
- | ||
68 | }; |
66 | read-only; |
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69 | |
67 | }; |
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Line 70... | Line 68... | |||
70 | partition@30000 { |
68 | |
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71 | reg = <0x30000 0x10000>; |
69 | u-boot-env@30000 { |
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72 | label = "u-boot-env"; |
- | ||
73 | read-only; |
70 | reg = <0x30000 0x10000>; |
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74 | }; |
71 | read-only; |
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Line 75... | Line 72... | |||
75 | |
72 | }; |
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76 | factory: partition@40000 { |
73 | |
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77 | reg = <0x40000 0x10000>; |
- | ||
78 | label = "factory"; |
74 | factory: factory@40000 { |
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79 | read-only; |
75 | reg = <0x40000 0x10000>; |
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Line 80... | Line 76... | |||
80 | }; |
76 | read-only; |
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81 | |
- | ||
82 | partition@50000 { |
77 | }; |
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83 | reg = <0x50000 0x50000>; |
- | ||
84 | label = "permanent_config"; |
78 | |
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85 | read-only; |
79 | permanent_config@50000 { |
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86 | }; |
80 | reg = <0x50000 0x50000>; |
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87 | |
81 | read-only; |
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Line 125... | Line 119... | |||
125 | }; |
119 | }; |
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126 | }; |
120 | }; |
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Line 127... | Line 121... | |||
127 | |
121 | |
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128 | &pcie { |
122 | &pcie { |
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129 | status = "okay"; |
- | ||
Line 130... | Line 123... | |||
130 | }; |
123 | status = "okay"; |
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131 | |
124 | |
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132 | &pcie0 { |
125 | pcie-bridge { |
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- | 126 | mt76@0,0 { |
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133 | mt76@0,0 { |
127 | reg = <0x0000 0 0 0 0>; |
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134 | reg = <0x0000 0 0 0 0>; |
128 | device_type = "pci"; |
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- | 129 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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135 | mediatek,mtd-eeprom = <&factory 0x8000>; |
130 | ieee80211-freq-limit = <5000000 6000000>; |
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136 | ieee80211-freq-limit = <5000000 6000000>; |
131 | }; |
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Line 137... | Line 132... | |||
137 | }; |
132 | }; |
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138 | }; |
133 | }; |