OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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Line 9... | Line 9... | |||
9 | |
9 | |
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10 | / { |
10 | / { |
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11 | compatible = "netgear,ex3700", "ralink,mt7620a-soc"; |
11 | compatible = "netgear,ex3700", "ralink,mt7620a-soc"; |
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Line 12... | Line -... | |||
12 | model = "Netgear EX3700/EX3800"; |
- | ||
13 | |
- | ||
14 | aliases { |
- | ||
15 | led-boot = &led_power_green; |
- | ||
16 | led-failsafe = &led_power_green; |
- | ||
17 | led-running = &led_power_green; |
- | ||
18 | led-upgrade = &led_power_green; |
- | ||
19 | }; |
12 | model = "Netgear EX3700/EX3800"; |
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20 | |
13 | |
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21 | chosen { |
14 | chosen { |
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Line 22... | Line 15... | |||
22 | bootargs = "console=ttyS0,57600"; |
15 | bootargs = "console=ttyS0,57600"; |
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23 | }; |
16 | }; |
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Line 24... | Line 17... | |||
24 | |
17 | |
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25 | leds { |
18 | gpio-leds { |
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26 | compatible = "gpio-leds"; |
19 | compatible = "gpio-leds"; |
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27 | |
20 | |
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28 | led_power_green: power_g { |
21 | power_g { |
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Line 29... | Line 22... | |||
29 | label = "ex3700:green:power"; |
22 | label = "ex3700:green:power"; |
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30 | gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; |
23 | gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; |
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31 | default-state = "on"; |
24 | default-state = "on"; |
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- | 25 | }; |
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32 | }; |
26 | |
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Line 33... | Line 27... | |||
33 | |
27 | power_a { |
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34 | power_a { |
28 | label = "ex3700:amber:power"; |
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35 | label = "ex3700:amber:power"; |
29 | gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; |
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Line 60... | Line 54... | |||
60 | label = "ex3700:green:wps"; |
54 | label = "ex3700:green:wps"; |
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61 | gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; |
55 | gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; |
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62 | }; |
56 | }; |
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63 | }; |
57 | }; |
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Line 64... | Line 58... | |||
64 | |
58 | |
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65 | keys { |
59 | gpio-keys-polled { |
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- | 60 | compatible = "gpio-keys-polled"; |
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- | 61 | #address-cells = <1>; |
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66 | compatible = "gpio-keys-polled"; |
62 | #size-cells = <0>; |
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Line 67... | Line 63... | |||
67 | poll-interval = <20>; |
63 | poll-interval = <20>; |
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68 | |
64 | |
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69 | reset { |
65 | reset { |
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Line 90... | Line 86... | |||
90 | |
86 | |
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91 | &spi0 { |
87 | &spi0 { |
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Line 92... | Line 88... | |||
92 | status = "okay"; |
88 | status = "okay"; |
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- | 89 | |
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- | 90 | m25p80@0 { |
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93 | |
91 | #address-cells = <1>; |
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94 | m25p80@0 { |
92 | #size-cells = <1>; |
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95 | compatible = "jedec,spi-nor"; |
93 | compatible = "jedec,spi-nor"; |
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Line 96... | Line -... | |||
96 | reg = <0>; |
- | ||
97 | spi-max-frequency = <10000000>; |
- | ||
98 | |
- | ||
99 | partitions { |
- | ||
100 | compatible = "fixed-partitions"; |
- | ||
101 | #address-cells = <1>; |
94 | reg = <0>; |
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102 | #size-cells = <1>; |
95 | spi-max-frequency = <10000000>; |
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103 | |
96 | |
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104 | partition@0 { |
97 | partition@0 { |
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105 | label = "u-boot"; |
98 | label = "u-boot"; |
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106 | reg = <0x0 0x30000>; |
99 | reg = <0x0 0x30000>; |
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107 | read-only; |
100 | read-only; |
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108 | }; |
101 | }; |
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109 | |
102 | |
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110 | partition@30000 { |
103 | partition@30000 { |
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111 | label = "config"; |
104 | label = "config"; |
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112 | reg = <0x30000 0x10000>; |
105 | reg = <0x30000 0x10000>; |
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113 | read-only; |
106 | read-only; |
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114 | }; |
107 | }; |
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115 | |
108 | |
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116 | factory: partition@40000 { |
109 | factory: partition@40000 { |
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117 | label = "factory"; |
110 | label = "factory"; |
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118 | reg = <0x40000 0x10000>; |
111 | reg = <0x40000 0x10000>; |
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119 | read-only; |
112 | read-only; |
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120 | }; |
- | ||
121 | |
113 | }; |
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122 | partition@50000 { |
114 | |
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123 | compatible = "denx,uimage"; |
115 | partition@50000 { |
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124 | label = "firmware"; |
116 | label = "firmware"; |
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125 | reg = <0x50000 0x790000>; |
117 | reg = <0x50000 0x790000>; |
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126 | }; |
118 | }; |
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127 | |
119 | |
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128 | partition@7e0000 { |
120 | partition@7e0000 { |
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129 | label = "board_data"; |
121 | label = "board_data"; |
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130 | reg = <0x7e0000 0x10000>; |
122 | reg = <0x7e0000 0x10000>; |
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131 | read-only; |
123 | read-only; |
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132 | }; |
124 | }; |
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133 | |
125 | |
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134 | partition@7f0000 { |
126 | partition@7f0000 { |
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135 | label = "nvram"; |
- | ||
136 | reg = <0x7f0000 0x10000>; |
127 | label = "nvram"; |
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137 | read-only; |
128 | reg = <0x7f0000 0x10000>; |
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138 | }; |
129 | read-only; |
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Line 139... | Line 130... | |||
139 | }; |
130 | }; |
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140 | }; |
131 | }; |
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141 | }; |
- | ||
Line 142... | Line 132... | |||
142 | |
132 | }; |
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143 | &pcie { |
133 | |
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144 | status = "okay"; |
134 | &pcie { |
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- | 135 | status = "okay"; |
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145 | }; |
136 | |
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146 | |
137 | pcie-bridge { |
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- | 138 | mt76@0,0 { |
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147 | &pcie0 { |
139 | reg = <0x0000 0 0 0 0 >; |
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148 | mt76@0,0 { |
140 | device_type = "pci"; |
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Line 149... | Line 141... | |||
149 | reg = <0x0000 0 0 0 0 >; |
141 | mediatek,mtd-eeprom = <&factory 0x8000>; |
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150 | mediatek,mtd-eeprom = <&factory 0x8000>; |
142 | ieee80211-freq-limit = <5000000 6000000>; |