OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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Line 7... | Line 7... | |||
7 | |
7 | |
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8 | / { |
8 | / { |
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9 | compatible = "tplink,c20-v4", "mediatek,mt7628an-soc"; |
9 | compatible = "tplink,c20-v4", "mediatek,mt7628an-soc"; |
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Line 10... | Line -... | |||
10 | model = "TP-Link Archer C20 v4"; |
- | ||
11 | |
- | ||
12 | aliases { |
- | ||
13 | led-boot = &led_power; |
- | ||
14 | led-failsafe = &led_power; |
- | ||
15 | led-running = &led_power; |
- | ||
16 | led-upgrade = &led_power; |
- | ||
17 | }; |
10 | model = "TP-Link Archer C20 v4"; |
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18 | |
11 | |
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Line 19... | Line 12... | |||
19 | leds { |
12 | gpio-leds { |
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20 | compatible = "gpio-leds"; |
13 | compatible = "gpio-leds"; |
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21 | |
14 | |
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22 | lan { |
15 | lan { |
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Line 23... | Line 16... | |||
23 | label = "c20-v4:green:lan"; |
16 | label = "c20-v4:green:lan"; |
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24 | gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
17 | gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; |
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25 | }; |
18 | }; |
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26 | |
19 | |
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Line 27... | Line 20... | |||
27 | led_power: power { |
20 | power { |
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Line 36... | Line 29... | |||
36 | |
29 | |
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37 | wan_orange { |
30 | wan_orange { |
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38 | label = "c20-v4:orange:wan"; |
31 | label = "c20-v4:orange:wan"; |
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39 | gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; |
32 | gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; |
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40 | }; |
33 | }; |
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41 | |
34 | |
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42 | wlan5g { |
35 | wlan5g { |
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43 | label = "c20-v4:green:wlan5g"; |
36 | label = "c20-v4:green:wlan5g"; |
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44 | gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
37 | gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; |
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Line 53... | Line 46... | |||
53 | label = "c20-v4:green:wps"; |
46 | label = "c20-v4:green:wps"; |
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54 | gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
47 | gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
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55 | }; |
48 | }; |
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56 | }; |
49 | }; |
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Line 57... | Line 50... | |||
57 | |
50 | |
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58 | keys { |
51 | gpio-keys-polled { |
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- | 52 | compatible = "gpio-keys-polled"; |
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- | 53 | #address-cells = <1>; |
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59 | compatible = "gpio-keys-polled"; |
54 | #size-cells = <0>; |
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Line 60... | Line 55... | |||
60 | poll-interval = <20>; |
55 | poll-interval = <20>; |
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61 | |
56 | |
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62 | reset { |
57 | reset { |
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Line 90... | Line 85... | |||
90 | }; |
85 | }; |
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91 | }; |
86 | }; |
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Line 92... | Line 87... | |||
92 | |
87 | |
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93 | &pcie { |
88 | &pcie { |
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94 | status = "okay"; |
- | ||
Line 95... | Line 89... | |||
95 | }; |
89 | status = "okay"; |
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96 | |
90 | |
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97 | &pcie0 { |
91 | pcie-bridge { |
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- | 92 | mt76@0,0 { |
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98 | mt76@0,0 { |
93 | reg = <0x0000 0 0 0 0>; |
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99 | reg = <0x0000 0 0 0 0>; |
94 | device_type = "pci"; |
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100 | mediatek,mtd-eeprom = <&factory 0x28000>; |
95 | mediatek,mtd-eeprom = <&factory 0x28000>; |
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101 | ieee80211-freq-limit = <5000000 6000000>; |
96 | ieee80211-freq-limit = <5000000 6000000>; |
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- | 97 | mtd-mac-address = <&factory 0xf100>; |
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102 | mtd-mac-address = <&factory 0xf100>; |
98 | mtd-mac-address-increment = <(-1)>; |
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103 | mtd-mac-address-increment = <(-1)>; |
99 | }; |