OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 1... Line 1...
1 /dts-v1/; 1 /dts-v1/;
Line 2... Line 2...
2   2  
-   3 #include "vr9.dtsi"
-   4  
-   5 #include <dt-bindings/input/input.h>
Line 3... Line 6...
3 #include "VR200.dtsi" 6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
4   7  
5 / { 8 / {
Line 6... Line 9...
6 compatible = "tplink,vr200v", "lantiq,xway", "lantiq,vr9"; 9 compatible = "tplink,vr200v", "lantiq,xway", "lantiq,vr9";
7 model = "TP-LINK Archer VR200v"; 10 model = "TP-LINK Archer VR200v";
8   11  
Line 9... Line 12...
9 chosen { 12 chosen {
10 bootargs = "console=ttyLTQ0,115200 mem=126M vpe1_load_addr=0x87e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp"; 13 bootargs = "console=ttyLTQ0,115200";
11 }; 14 };
12   -  
13 aliases { -  
Line 14... Line 15...
14 led-boot = &power; 15  
15 led-failsafe = &power; 16 aliases {
16 led-running = &power; -  
17 led-upgrade = &power; -  
18   17 led-boot = &power;
19 led-dsl = &dsl; 18 led-failsafe = &power;
20 led-internet = &internet; 19  
Line -... Line 20...
-   20 led-dsl = &dsl;
-   21 led-internet = &internet;
-   22 led-usb = &led_usb;
-   23 led-usb2 = &led_usb;
21 led-wifi = &wlan5g; 24 };
22   25  
23 led-usb = &led_usb; 26 memory@0 {
24 led-usb2 = &led_usb; 27 reg = <0x0 0x7f00000>;
25 }; 28 };
Line 58... Line 61...
58 gpio-leds { 61 gpio-leds {
59 compatible = "gpio-leds"; 62 compatible = "gpio-leds";
60 power: power { 63 power: power {
61 label = "vr200v:blue:power"; 64 label = "vr200v:blue:power";
62 gpios = <&gpio 46 GPIO_ACTIVE_LOW>; 65 gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
63 default-state = "keep"; -  
64 }; 66 };
65 dsl: dsl { 67 dsl: dsl {
66 label = "vr200v:blue:dsl"; 68 label = "vr200v:blue:dsl";
67 gpios = <&gpio 4 GPIO_ACTIVE_LOW>; 69 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
68 }; 70 };
Line 80... Line 82...
80 }; 82 };
81 wlan { 83 wlan {
82 label = "vr200v:blue:wlan"; 84 label = "vr200v:blue:wlan";
83 gpios = <&gpio 24 GPIO_ACTIVE_LOW>; 85 gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
84 }; 86 };
85 wlan5g: wifi { 87 wlan5g {
86 label = "vr200v:blue:wlan5g"; 88 label = "vr200v:blue:wlan5g";
87 gpios = <&gpio 20 GPIO_ACTIVE_LOW>; 89 gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
88 }; 90 };
89 phone { 91 phone {
90 label = "vr200v:blue:phone"; 92 label = "vr200v:blue:phone";
91 gpios = <&gpio 44 GPIO_ACTIVE_LOW>; 93 gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
92 }; 94 };
-   95 };
-   96  
-   97 usb_vbus: regulator-usb-vbus {
-   98 compatible = "regulator-fixed";
-   99  
-   100 regulator-name = "USB_VBUS";
-   101  
-   102 regulator-min-microvolt = <5000000>;
-   103 regulator-max-microvolt = <5000000>;
-   104  
-   105 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
-   106 enable-active-high;
-   107 };
-   108 };
-   109  
-   110 &eth0 {
-   111 lan: interface@0 {
-   112 compatible = "lantiq,xrx200-pdi";
-   113 #address-cells = <1>;
-   114 #size-cells = <0>;
-   115 reg = <0>;
-   116 mtd-mac-address = <&romfile 0xf100>;
-   117 lantiq,switch;
-   118  
-   119 ethernet@0 {
-   120 compatible = "lantiq,xrx200-pdi-port";
-   121 reg = <0>;
-   122 phy-mode = "rgmii";
-   123 phy-handle = <&phy0>;
-   124 // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
-   125 };
-   126 ethernet@5 {
-   127 compatible = "lantiq,xrx200-pdi-port";
-   128 reg = <5>;
-   129 phy-mode = "rgmii";
-   130 phy-handle = <&phy5>;
-   131 };
-   132 ethernet@2 {
-   133 compatible = "lantiq,xrx200-pdi-port";
-   134 reg = <2>;
-   135 phy-mode = "gmii";
-   136 phy-handle = <&phy11>;
-   137 };
-   138 ethernet@3 {
-   139 compatible = "lantiq,xrx200-pdi-port";
-   140 reg = <4>;
-   141 phy-mode = "gmii";
-   142 phy-handle = <&phy13>;
-   143 };
-   144 };
-   145  
-   146 mdio@0 {
-   147 #address-cells = <1>;
-   148 #size-cells = <0>;
-   149 compatible = "lantiq,xrx200-mdio";
-   150 reg = <0>;
-   151  
-   152 phy0: ethernet-phy@0 {
-   153 reg = <0x0>;
-   154 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-   155 };
-   156 phy5: ethernet-phy@5 {
-   157 reg = <0x5>;
-   158 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-   159 };
-   160 phy11: ethernet-phy@11 {
-   161 reg = <0x11>;
-   162 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-   163 };
-   164 phy13: ethernet-phy@13 {
-   165 reg = <0x13>;
-   166 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-   167 };
-   168 };
-   169 };
-   170  
-   171 &gphy0 {
-   172 lantiq,gphy-mode = <GPHY_MODE_GE>;
-   173 };
-   174  
-   175 &gphy1 {
-   176 lantiq,gphy-mode = <GPHY_MODE_GE>;
-   177 };
-   178  
-   179 &gpio {
-   180 pinctrl-names = "default";
-   181 pinctrl-0 = <&state_default>;
-   182  
-   183 state_default: pinmux {
-   184 mdio {
-   185 lantiq,groups = "mdio";
-   186 lantiq,function = "mdio";
-   187 };
-   188 gphy-leds {
-   189 lantiq,groups = "gphy0 led1", "gphy1 led1";
-   190 lantiq,function = "gphy";
-   191 lantiq,pull = <2>;
-   192 lantiq,open-drain = <0>;
-   193 lantiq,output = <1>;
-   194 };
-   195 phy-rst {
-   196 lantiq,pins = "io42";
-   197 lantiq,pull = <0>;
-   198 lantiq,open-drain = <0>;
-   199 lantiq,output = <1>;
-   200 };
-   201 pcie-rst {
-   202 lantiq,pins = "io38";
-   203 lantiq,pull = <0>;
-   204 lantiq,output = <1>;
-   205 };
-   206 };
-   207 pins_spi_default: pins_spi_default {
-   208 spi_in {
-   209 lantiq,groups = "spi_di";
-   210 lantiq,function = "spi";
-   211 };
-   212 spi_out {
-   213 lantiq,groups = "spi_do", "spi_clk",
-   214 "spi_cs4";
-   215 lantiq,function = "spi";
-   216 lantiq,output = <1>;
-   217 };
93 }; 218 };
-   219 };
-   220  
-   221 &pci0 {
-   222 status = "okay";
-   223 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
-   224 };
-   225  
-   226 &spi {
-   227 status = "okay";
-   228  
-   229 pinctrl-names = "default";
-   230 pinctrl-0 = <&pins_spi_default>;
-   231  
-   232 m25p80@4 {
-   233 #address-cells = <1>;
-   234 #size-cells = <1>;
-   235 compatible = "jedec,spi-nor";
-   236 reg = <4 0>;
-   237 spi-max-frequency = <33250000>;
-   238 m25p,fast-read;
-   239  
-   240 partitions {
-   241 compatible = "fixed-partitions";
-   242 #address-cells = <1>;
-   243 #size-cells = <1>;
-   244  
-   245 partition@0 {
-   246 reg = <0x0 0x20000>;
-   247 label = "u-boot";
-   248 read-only;
-   249 };
-   250  
-   251 partition@20000 {
-   252 reg = <0x20000 0xf90000>;
-   253 label = "firmware";
-   254 };
-   255  
-   256 partition@fb0000 {
-   257 reg = <0xfb0000 0x10000>;
-   258 label = "radioDECT";
-   259 read-only;
-   260 };
-   261  
-   262 partition@fc0000 {
-   263 reg = <0xfc0000 0x10000>;
-   264 label = "config";
-   265 read-only;
-   266 };
-   267  
-   268 romfile: partition@fd0000 {
-   269 reg = <0xfd0000 0x10000>;
-   270 label = "romfile";
-   271 read-only;
-   272 };
-   273  
-   274 partition@fe0000 {
-   275 reg = <0xfe0000 0x10000>;
-   276 label = "rom";
-   277 read-only;
-   278 };
-   279  
-   280 partition@ff0000 {
-   281 reg = <0xff0000 0x10000>;
-   282 label = "radio";
-   283 read-only;
-   284 };
-   285 };
-   286 };
-   287 };
-   288  
-   289 &usb_phy0 {
-   290 status = "okay";
-   291 phy-supply = <&usb_vbus>;
-   292 };
-   293  
-   294 &usb_phy1 {
-   295 status = "okay";
-   296 phy-supply = <&usb_vbus>;
-   297 };
-   298  
-   299 &usb0 {
-   300 status = "okay";
94 }; 301 };
Line 95... Line 302...
95   302  
96 &vmmc { 303 &usb1 {
97 status = "okay"; -  
98 gpios = <&gpio 30 GPIO_ACTIVE_HIGH //fxs relay -  
99 &gpio 31 GPIO_ACTIVE_HIGH //still unknown -  
100 &gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic? 304 status = "okay";