OpenWrt – Diff between revs 2 and 3

Subversion Repositories:
Rev:
Show entire fileIgnore whitespace
Rev 2 Rev 3
Line 197... Line 197...
197 #define AR8327_ATU_ADDR4 BITS(0, 8) 197 #define AR8327_ATU_ADDR4 BITS(0, 8)
198 #define AR8327_ATU_ADDR4_S 0 198 #define AR8327_ATU_ADDR4_S 0
199 #define AR8327_ATU_ADDR5 BITS(8, 8) 199 #define AR8327_ATU_ADDR5 BITS(8, 8)
200 #define AR8327_ATU_ADDR5_S 8 200 #define AR8327_ATU_ADDR5_S 8
201 #define AR8327_ATU_PORTS BITS(16, 7) 201 #define AR8327_ATU_PORTS BITS(16, 7)
202 #define AR8327_ATU_PORTS_S 16 -  
203 #define AR8327_ATU_PORT0 BIT(16) 202 #define AR8327_ATU_PORT0 BIT(16)
204 #define AR8327_ATU_PORT1 BIT(17) 203 #define AR8327_ATU_PORT1 BIT(17)
205 #define AR8327_ATU_PORT2 BIT(18) 204 #define AR8327_ATU_PORT2 BIT(18)
206 #define AR8327_ATU_PORT3 BIT(19) 205 #define AR8327_ATU_PORT3 BIT(19)
207 #define AR8327_ATU_PORT4 BIT(20) 206 #define AR8327_ATU_PORT4 BIT(20)
Line 277... Line 276...
277 #define AR8327_PORT_LOOKUP_LEARN BIT(20) 276 #define AR8327_PORT_LOOKUP_LEARN BIT(20)
278 #define AR8327_PORT_LOOKUP_ING_MIRROR_EN BIT(25) 277 #define AR8327_PORT_LOOKUP_ING_MIRROR_EN BIT(25)
Line 279... Line 278...
279   278  
Line -... Line 279...
-   279 #define AR8327_REG_PORT_PRIO(_i) (0x664 + (_i) * 0xc)
-   280  
-   281 #define AR8327_REG_PORT_HOL_CTRL0(_i) (0x970 + (_i) * 0x8)
-   282 #define AR8327_PORT_HOL_CTRL0_EG_PRI0_BUF BITS(0, 4)
-   283 #define AR8327_PORT_HOL_CTRL0_EG_PRI0_BUF_S 0
-   284 #define AR8327_PORT_HOL_CTRL0_EG_PRI1_BUF BITS(4, 4)
-   285 #define AR8327_PORT_HOL_CTRL0_EG_PRI1_BUF_S 4
-   286 #define AR8327_PORT_HOL_CTRL0_EG_PRI2_BUF BITS(8, 4)
-   287 #define AR8327_PORT_HOL_CTRL0_EG_PRI2_BUF_S 8
-   288 #define AR8327_PORT_HOL_CTRL0_EG_PRI3_BUF BITS(12, 4)
-   289 #define AR8327_PORT_HOL_CTRL0_EG_PRI3_BUF_S 12
-   290 #define AR8327_PORT_HOL_CTRL0_EG_PRI4_BUF BITS(16, 4)
-   291 #define AR8327_PORT_HOL_CTRL0_EG_PRI4_BUF_S 16
-   292 #define AR8327_PORT_HOL_CTRL0_EG_PRI5_BUF BITS(20, 4)
-   293 #define AR8327_PORT_HOL_CTRL0_EG_PRI5_BUF_S 20
-   294 #define AR8327_PORT_HOL_CTRL0_EG_PORT_BUF BITS(24, 6)
280 #define AR8327_REG_PORT_PRIO(_i) (0x664 + (_i) * 0xc) 295 #define AR8327_PORT_HOL_CTRL0_EG_PORT_BUF_S 24
-   296  
-   297 #define AR8327_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8)
-   298 #define AR8327_PORT_HOL_CTRL1_ING_BUF BITS(0, 4)
-   299 #define AR8327_PORT_HOL_CTRL1_ING_BUF_S 0
-   300 #define AR8327_PORT_HOL_CTRL1_EG_PRI_BUF_EN BIT(6)
281   301 #define AR8327_PORT_HOL_CTRL1_EG_PORT_BUF_EN BIT(7)
Line 282... Line 302...
282 #define AR8327_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8) 302 #define AR8327_PORT_HOL_CTRL1_WRED_EN BIT(8)
Line 283... Line -...
283 #define AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16) -  
284   -  
285 #define AR8337_PAD_MAC06_EXCHANGE_EN BIT(31) -  
286   -  
287 #define AR8327_PHY_MODE_SEL 0x12 -  
288 #define AR8327_PHY_MODE_SEL_RGMII BIT(3) -  
289 #define AR8327_PHY_TEST_CTRL 0x0 -  
290 #define AR8327_PHY_TEST_CTRL_RGMII_RX_DELAY BIT(15) 303 #define AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)
291 #define AR8327_PHY_SYS_CTRL 0x5 304  
292 #define AR8327_PHY_SYS_CTRL_RGMII_TX_DELAY BIT(8) 305 #define AR8337_PAD_MAC06_EXCHANGE_EN BIT(31)
293   306  
294 enum ar8327_led_pattern { 307 enum ar8327_led_pattern {