OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
Line 81... Line 81...
81 .gpio = TL_WR1043ND_GPIO_BTN_QSS, 81 .gpio = TL_WR1043ND_GPIO_BTN_QSS,
82 .active_low = 1, 82 .active_low = 1,
83 } 83 }
84 }; 84 };
Line 85... Line 85...
85   85  
86 static void tl_wr1043nd_rtl8366rb_hw_reset(struct rtl8366_smi *smi, bool active) 86 static void tl_wr1043nd_rtl8366rb_hw_reset(bool active)
87 { 87 {
88 if (active) 88 if (active)
89 ath79_device_reset_set(AR71XX_RESET_GE0_PHY); 89 ath79_device_reset_set(AR71XX_RESET_GE0_PHY);
90 else 90 else
Line 108... Line 108...
108 static void __init tl_wr1043nd_setup(void) 108 static void __init tl_wr1043nd_setup(void)
109 { 109 {
110 u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); 110 u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
111 u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); 111 u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
Line 112... Line 112...
112   112  
Line 113... Line 113...
113 tl_wr1043nd_rtl8366rb_hw_reset(NULL, true); 113 tl_wr1043nd_rtl8366rb_hw_reset(true);
114   114  
115 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); 115 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
116 ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; 116 ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev;