OpenWrt – Diff between revs 2 and 3

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Line 19... Line 19...
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA 20 * MA 02111-1307 USA
21 * 21 *
22 */ 22 */
Line 23... Line -...
23   -  
24 #include <dt-bindings/dma/dw-dmac.h> 23  
25 #include <dt-bindings/input/input.h> 24 #include <dt-bindings/input/input.h>
26 #include <dt-bindings/interrupt-controller/irq.h> 25 #include <dt-bindings/interrupt-controller/irq.h>
Line 27... Line 26...
27 #include <dt-bindings/gpio/gpio.h> 26 #include <dt-bindings/gpio/gpio.h>
Line 31... Line 30...
31 #size-cells = <1>; 30 #size-cells = <1>;
32 dcr-parent = <&{/cpus/cpu@0}>; 31 dcr-parent = <&{/cpus/cpu@0}>;
33 compatible = "apm,bluestone"; 32 compatible = "apm,bluestone";
Line 34... Line 33...
34   33  
35 aliases { 34 aliases {
36 ethernet0 = &EMAC0; /* needed for BSP u-boot */ 35 ethernet0 = &EMAC0;
Line 37... Line 36...
37 }; 36 };
38   37  
39 cpus { 38 cpus {
Line 60... Line 59...
60 device_type = "memory"; 59 device_type = "memory";
61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 60 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
62 }; 61 };
Line 63... Line 62...
63   62  
64 UIC0: interrupt-controller0 { 63 UIC0: interrupt-controller0 {
65 compatible = "apm,uic-apm82181", "ibm,uic"; 64 compatible = "apm,uic-apm82181","ibm,uic";
66 interrupt-controller; 65 interrupt-controller;
67 cell-index = <0>; 66 cell-index = <0>;
68 dcr-reg = <0x0c0 0x009>; 67 dcr-reg = <0x0c0 0x009>;
69 #address-cells = <0>; 68 #address-cells = <0>;
70 #size-cells = <0>; 69 #size-cells = <0>;
71 #interrupt-cells = <2>; 70 #interrupt-cells = <2>;
Line 72... Line 71...
72 }; 71 };
73   72  
74 UIC1: interrupt-controller1 { 73 UIC1: interrupt-controller1 {
75 compatible = "apm,uic-apm82181", "ibm,uic"; 74 compatible = "apm,uic-apm82181","ibm,uic";
76 interrupt-controller; 75 interrupt-controller;
77 cell-index = <1>; 76 cell-index = <1>;
78 dcr-reg = <0x0d0 0x009>; 77 dcr-reg = <0x0d0 0x009>;
79 #address-cells = <0>; 78 #address-cells = <0>;
80 #size-cells = <0>; 79 #size-cells = <0>;
81 #interrupt-cells = <2>; 80 #interrupt-cells = <2>;
82 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>, 81 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH
83 <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */ 82 0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
Line 84... Line 83...
84 interrupt-parent = <&UIC0>; 83 interrupt-parent = <&UIC0>;
85 }; 84 };
86   85  
87 UIC2: interrupt-controller2 { 86 UIC2: interrupt-controller2 {
88 compatible = "apm,uic-apm82181", "ibm,uic"; 87 compatible = "apm,uic-apm82181","ibm,uic";
89 interrupt-controller; 88 interrupt-controller;
90 cell-index = <2>; 89 cell-index = <2>;
91 dcr-reg = <0x0e0 0x009>; 90 dcr-reg = <0x0e0 0x009>;
92 #address-cells = <0>; 91 #address-cells = <0>;
93 #size-cells = <0>; 92 #size-cells = <0>;
94 #interrupt-cells = <2>; 93 #interrupt-cells = <2>;
95 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>, 94 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH
Line 96... Line 95...
96 <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */ 95 0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
97 interrupt-parent = <&UIC0>; 96 interrupt-parent = <&UIC0>;
Line 103... Line 102...
103 cell-index = <3>; 102 cell-index = <3>;
104 dcr-reg = <0x0f0 0x009>; 103 dcr-reg = <0x0f0 0x009>;
105 #address-cells = <0>; 104 #address-cells = <0>;
106 #size-cells = <0>; 105 #size-cells = <0>;
107 #interrupt-cells = <2>; 106 #interrupt-cells = <2>;
108 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>, 107 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH
109 <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */ 108 0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
110 interrupt-parent = <&UIC0>; 109 interrupt-parent = <&UIC0>;
111 }; 110 };
Line 112... Line 111...
112   111  
113 OCM1: ocm@400040000 { 112 OCM1: ocm@400040000 {
Line 155... Line 154...
155   154  
156 plb { 155 plb {
157 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4"; 156 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
158 #address-cells = <2>; 157 #address-cells = <2>;
159 #size-cells = <1>; 158 #size-cells = <1>;
160 ranges; /* Filled in by U-Boot */ 159 ranges;
Line 161... Line 160...
161 clock-frequency = <0>; /* Filled in by U-Boot */ 160 clock-frequency = <0>; /* Filled in by U-Boot */
162   161  
163 SDRAM0: sdram { 162 SDRAM0: sdram {
Line 171... Line 170...
171 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>; 170 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
172 interrupt-parent = <&UIC2>; 171 interrupt-parent = <&UIC2>;
Line 173... Line 172...
173   172  
Line 174... Line 173...
174 }; 173 };
175   174  
176 TRNG: trng@110000 { 175 CRYPTO: crypto@180000 {
177 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng"; 176 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
178 reg = <4 0x00110000 0x100>; 177 reg = <4 0x00180000 0x80400>;
179 interrupt-parent = <&UIC1>; 178 interrupt-parent = <&UIC0>;
180 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>; 179 interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
Line 181... Line 180...
181 status = "disabled"; 180 status = "disabled";
-   181 };
182 }; 182  
183   183 PKA: pka@114000 {
184 PKA: pka@114000 { 184 device_type = "pka";
185 compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka"; 185 compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
186 reg = <4 0x00114000 0x4000>; 186 reg = <4 0x00114000 0x4000>;
187 interrupt-parent = <&UIC0>; 187 interrupt-parent = <&UIC0>;
Line 188... Line 188...
188 interrupts = <0x14 IRQ_TYPE_EDGE_RISING>; 188 interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
-   189 status = "disabled";
189 status = "disabled"; 190 };
190 }; 191  
191   192 TRNG: trng@110000 {
192 CRYPTO: crypto@180000 { 193 device_type = "trng";
193 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; 194 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
194 reg = <4 0x00180000 0x80400>; 195 reg = <4 0x00110000 0x100>;
Line 195... Line 196...
195 interrupt-parent = <&UIC0>; 196 interrupt-parent = <&UIC1>;
196 interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>; 197 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
197 status = "disabled"; /* hardware option */ 198 status = "disabled";
Line 204... Line 205...
204 num-tx-chans = <1>; 205 num-tx-chans = <1>;
205 num-rx-chans = <1>; 206 num-rx-chans = <1>;
206 #address-cells = <0>; 207 #address-cells = <0>;
207 #size-cells = <0>; 208 #size-cells = <0>;
208 interrupt-parent = <&UIC2>; 209 interrupt-parent = <&UIC2>;
209 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>, 210 interrupts = < 0x06 IRQ_TYPE_LEVEL_HIGH /*TXEOB*/
210 <0x07 IRQ_TYPE_LEVEL_HIGH>, 211 0x07 IRQ_TYPE_LEVEL_HIGH /*RXEOB*/
211 <0x03 IRQ_TYPE_LEVEL_HIGH>, 212 0x03 IRQ_TYPE_LEVEL_HIGH /*SERR*/
212 <0x04 IRQ_TYPE_LEVEL_HIGH>, 213 0x04 IRQ_TYPE_LEVEL_HIGH /*TXDE*/
213 <0x05 IRQ_TYPE_LEVEL_HIGH>, 214 0x05 IRQ_TYPE_LEVEL_HIGH /*RXDE*/
214 <0x08 IRQ_TYPE_EDGE_FALLING>, 215 0x08 IRQ_TYPE_EDGE_FALLING /*TX0 COAL*/
215 <0x09 IRQ_TYPE_EDGE_FALLING>, 216 /*0x09 IRQ_TYPE_EDGE_FALLING TX1 COAL*/
216 <0x0c IRQ_TYPE_EDGE_FALLING>, 217 0x0c IRQ_TYPE_EDGE_FALLING /*RX0 COAL*/
217 <0x0d IRQ_TYPE_EDGE_FALLING>; 218 /*0x0d IRQ_TYPE_EDGE_FALLING RX1 COAL*/>;
-   219 };
-   220  
-   221 AHBDMA0: dma@bffd0800 {
-   222 compatible = "snps,dma-spear1340";
-   223 reg = <4 0xbffd0800 0x400>;
-   224 interrupt-parent = <&UIC0>;
-   225 interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
-   226 #dma-cells = <3>;
-   227 /* use autoconfiguration for the dma setup */
-   228 };
-   229  
-   230 SATA0: sata@bffd1000 {
-   231 compatible = "amcc,sata-460ex";
-   232 reg = <4 0xbffd1000 0x800>;
-   233 interrupt-parent = <&UIC0>;
218 interrupt-names = "txeob", "rxeob", "serr", 234 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
-   235 dmas = <&AHBDMA0 0 0 1>;
-   236 dma-names = "sata-dma";
219 "txde", "rxde", 237 status = "disabled";
-   238 };
-   239  
-   240 SATA1: sata@bffd1800 {
-   241 compatible = "amcc,sata-460ex";
-   242 reg = <4 0xbffd1800 0x800>;
-   243 interrupt-parent = <&UIC0>;
-   244 interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
-   245 dmas = <&AHBDMA0 1 0 2>;
220 "tx0coal", "tx1coal", 246 dma-names = "sata-dma";
-   247 status = "disabled";
-   248 };
-   249  
-   250 USBOTG0: usbotg@bff80000 {
-   251 compatible = "amcc,dwc-otg";
-   252 reg = <4 0xbff80000 0x10000>;
-   253 interrupt-parent = <&USBOTG0>;
-   254 interrupts = <0 1 2>;
-   255 #interrupt-cells = <1>;
-   256 #address-cells = <0>;
-   257 #size-cells = <0>;
-   258 interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH /* USB-OTG */
-   259 1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW /* HIGH-POWER */
-   260 2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH /* DMA */>;
221 "rx0coal", "rx1coal"; 261 dr_mode = "host";
-   262 status = "disabled";
222 }; 263 };
Line 223... Line 264...
223   264  
224 POB0: opb { 265 POB0: opb {
225 compatible = "ibm,opb-460ex", "ibm,opb"; 266 compatible = "ibm,opb-460ex", "ibm,opb";
Line 251... Line 292...
251 ndfc@1,0 { 292 ndfc@1,0 {
252 compatible = "ibm,ndfc"; 293 compatible = "ibm,ndfc";
253 reg = <00000003 00000000 00002000>; 294 reg = <00000003 00000000 00002000>;
254 ccr = <0x00001000>; 295 ccr = <0x00001000>;
255 bank-settings = <0x80002222>; 296 bank-settings = <0x80002222>;
-   297 #address-cells = <1>;
-   298 #size-cells = <1>;
256 status = "disabled"; 299 status = "disabled";
Line 257... Line 300...
257   300  
258 nand { 301 nand {
259 #address-cells = <1>; 302 #address-cells = <1>;
260 #size-cells = <1>; 303 #size-cells = <1>;
261 }; 304 };
262 }; 305 };
Line 263... Line 306...
263 }; 306 };
264   -  
265 UART0: serial@ef600300 { -  
266 /* -  
267 * AMCC's BSP u-boot scans for the "ns16550" -  
268 * compatible, without it, u-boot wouldn't -  
269 * set the required "clock-frequency". 307  
270 * -  
271 * The hardware documentation states: -  
272 * "Register compatibility with 16750 register set" 308 UART0: serial@ef600300 {
273 */ 309 device_type = "serial";
274 compatible = "ns16750", "ns16550"; 310 compatible = "ns16550";
275 reg = <0xef600300 0x00000008>; 311 reg = <0xef600300 0x00000008>;
-   312 virtual-reg = <0xef600300>;
276 virtual-reg = <0xef600300>; 313 clock-frequency = <0>; /* Filled in by U-Boot */
277 clock-frequency = <0>; /* Filled in by U-Boot */ 314 current-speed = <0>; /* Filled in by U-Boot */
278 interrupt-parent = <&UIC1>; 315 interrupt-parent = <&UIC1>;
279 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>; 316 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
Line 280... Line 317...
280 status = "disabled"; 317 status = "disabled";
281 }; 318 };
282   319  
283 UART1: serial@ef600400 { 320 UART1: serial@ef600400 {
284 /* same "ns16750" as with UART0 */ 321 device_type = "serial";
285 compatible = "ns16750", "ns16550"; 322 compatible = "ns16550";
-   323 reg = <0xef600400 0x00000008>;
286 reg = <0xef600400 0x00000008>; 324 virtual-reg = <0xef600400>;
287 virtual-reg = <0xef600400>; 325 clock-frequency = <0>; /* Filled in by U-Boot */
288 clock-frequency = <0>; /* Filled in by U-Boot */ 326 current-speed = <0>; /* Filled in by U-Boot */
289 interrupt-parent = <&UIC0>; 327 interrupt-parent = <&UIC0>;
Line -... Line 328...
-   328 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
-   329 status = "disabled";
-   330 };
-   331  
-   332 GPIO0: gpio@ef600b00 {
-   333 compatible = "ibm,ppc4xx-gpio";
-   334 reg = <0xef600b00 0x00000048>;
-   335 #gpio-cells = <2>;
290 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>; 336 gpio-controller;
291 status = "disabled"; 337 status = "disabled";
292 }; 338 };
293   339  
294 IIC0: i2c@ef600700 { 340 IIC0: i2c@ef600700 {
Line 307... Line 353...
307 interrupt-parent = <&UIC0>; 353 interrupt-parent = <&UIC0>;
308 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>; 354 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
309 status = "disabled"; 355 status = "disabled";
310 }; 356 };
Line 311... Line 357...
311   357  
312 GPIO0: gpio@ef600b00 { 358 RGMII0: emac-rgmii@ef601500 {
313 compatible = "ibm,ppc4xx-gpio"; 359 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
314 reg = <0xef600b00 0x00000048>; 360 reg = <0xef601500 0x00000008>;
-   361 has-mdio;
-   362 };
315 #gpio-cells = <2>; 363  
316 gpio-controller; 364 TAH0: emac-tah@ef601350 {
-   365 compatible = "ibm,tah-460ex", "ibm,tah";
317 status = "disabled"; 366 reg = <0xef601350 0x00000030>;
Line 318... Line 367...
318 }; 367 };
319   368  
320 EMAC0: ethernet@ef600c00 { 369 EMAC0: ethernet@ef600c00 {
321 device_type = "network"; 370 device_type = "network";
322 compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; 371 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
323 interrupt-parent = <&EMAC0>; 372 interrupt-parent = <&EMAC0>;
324 interrupts = <0 1>; 373 interrupts = <0 1>;
325 #interrupt-cells = <1>; 374 #interrupt-cells = <1>;
326 #address-cells = <0>; 375 #address-cells = <0>;
327 #size-cells = <0>; 376 #size-cells = <0>;
328 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>, -  
329 <1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>; -  
330 interrupt-names = "status", "wake"; 377 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
331   378 1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
332 reg = <0xef600c00 0x000000c4>; 379 reg = <0xef600c00 0x000000c4>;
333 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 380 local-mac-address = [000000000000]; /* Filled in by U-Boot */
334 mal-device = <&MAL0>; 381 mal-device = <&MAL0>;
335 mal-tx-channel = <0>; 382 mal-tx-channel = <0>;
336 mal-rx-channel = <0>; 383 mal-rx-channel = <0>;
337 cell-index = <0>; 384 cell-index = <0>;
338 max-frame-size = <9000>; 385 max-frame-size = <9000>;
-   386 rx-fifo-size = <16384>;
339 rx-fifo-size = <16384>; 387 tx-fifo-size = <2048>;
340 tx-fifo-size = <2048>; 388 fifo-entry-size = <10>;
341 phy-mode = "rgmii"; 389 phy-mode = "rgmii";
342 phy-map = <0x00000000>; 390 phy-map = <0x00000000>;
343 rgmii-device = <&RGMII0>; 391 rgmii-device = <&RGMII0>;
344 rgmii-channel = <0>; 392 rgmii-channel = <0>;
345 tah-device = <&TAH0>; 393 tah-device = <&TAH0>;
346 tah-channel = <0>; 394 tah-channel = <0>;
347 has-inverted-stacr-oc; 395 has-inverted-stacr-oc;
348 has-new-stacr-staopc; 396 has-new-stacr-staopc;
349 status = "disabled"; -  
350 }; -  
351   -  
352 TAH0: emac-tah@ef601350 { -  
353 compatible = "ibm,tah-460ex", "ibm,tah"; -  
354 reg = <0xef601350 0x00000030>; -  
355 }; -  
356   -  
357 RGMII0: emac-rgmii@ef601500 { -  
358 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; -  
359 reg = <0xef601500 0x00000008>; -  
360 has-mdio; -  
361 }; -  
362 }; -  
363   -  
364 USBOTG0: usbotg@bff80000 { -  
365 compatible = "amcc,dwc-otg"; -  
366 reg = <4 0xbff80000 0x10000>; -  
367 interrupt-parent = <&USBOTG0>; -  
368 interrupts = <0 1 2>; -  
369 #interrupt-cells = <1>; -  
370 #address-cells = <0>; -  
371 #size-cells = <0>; -  
372 interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>, -  
373 <1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>, -  
374 <2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>; -  
375 interrupt-names = "usb-otg", "high-power", "dma"; -  
376 dr_mode = "host"; -  
377 status = "disabled"; -  
378 }; -  
379   -  
380 AHBDMA0: dma@bffd0800 { -  
381 compatible = "snps,dma-spear1340"; -  
382 reg = <4 0xbffd0800 0x400>; -  
383 interrupt-parent = <&UIC0>; -  
384 interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>; -  
385 #dma-cells = <3>; -  
386   -  
387 dma-channels = <2>; -  
388 dma-masters = <3>; -  
389 block_size = <4095>; -  
390 data-width = <4>, <4>, <4>; -  
391 multi-block = <1>, <1>; -  
392   -  
393 chan_allocation_order = <1>; -  
394 chan_priority = <1>; -  
395   -  
396 snps,dma-protection-control = -  
397 <(DW_DMAC_HPROT1_PRIVILEGED_MODE | -  
398 DW_DMAC_HPROT2_BUFFERABLE)>; -  
399 is_memcpy; -  
400 }; -  
401   -  
402 SATA0: sata@bffd1000 { -  
403 compatible = "amcc,sata-460ex"; -  
404 reg = <4 0xbffd1000 0x800>; -  
405 interrupt-parent = <&UIC0>; -  
406 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>; -  
407 dmas = <&AHBDMA0 0 0 1>; -  
408 dma-names = "sata-dma"; -  
409 status = "disabled"; -  
410 }; -  
411   -  
412 SATA1: sata@bffd1800 { -  
413 compatible = "amcc,sata-460ex"; -  
414 reg = <4 0xbffd1800 0x800>; -  
415 interrupt-parent = <&UIC0>; -  
416 interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>; -  
417 dmas = <&AHBDMA0 1 0 2>; -  
418 dma-names = "sata-dma"; -  
419 status = "disabled"; -  
420 }; -  
421   -  
422 MSI: ppc4xx-msi@c10000000 { -  
423 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; -  
424 reg = <0xc 0x10000000 0x100 -  
425 0xc 0x10000000 0x100>; -  
426 sdr-base = <0x36C>; -  
427 msi-data = <0x00004440>; -  
428 msi-mask = <0x0000ffe0>; -  
429 interrupts =<0 1 2 3 4 5 6 7>; -  
430 interrupt-parent = <&MSI>; -  
431 #interrupt-cells = <1>; -  
432 #address-cells = <0>; -  
433 #size-cells = <0>; -  
434 msi-available-ranges = <0x0 0x100>; -  
435 interrupt-map = -  
436 <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>, -  
437 <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>, -  
438 <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>, -  
439 <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>, -  
440 <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>, -  
441 <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>, -  
442 <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>, -  
443 <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>; 397 status = "disabled";
Line 444... Line 398...
444 status = "disabled"; 398 };
445 }; 399 };
446   400  
447 PCIE0: pciex@d00000000 { 401 PCIE0: pciex@d00000000 {
448 device_type = "pci"; /* see ppc4xx_pci_find_bridge */ 402 device_type = "pci";
449 #interrupt-cells = <1>; 403 #interrupt-cells = <1>;
450 #size-cells = <2>; 404 #size-cells = <2>;
451 #address-cells = <3>; 405 #address-cells = <3>;
452 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; 406 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
453 primary; 407 primary;
454 port = <0x0>; /* port number */ 408 port = <0x0>; /* port number */
455 reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */ 409 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
Line 456... Line 410...
456 <0x0000000c 0x08010000 0x00001000>; /* Registers */ 410 0x0000000c 0x08010000 0x00001000>; /* Registers */
457 dcr-reg = <0x100 0x020>; 411 dcr-reg = <0x100 0x020>;
458 sdr-base = <0x300>; 412 sdr-base = <0x300>;
459   413  
460 /* Outbound ranges, one memory and one IO, 414 /* Outbound ranges, one memory and one IO,
461 * later cannot be changed 415 * later cannot be changed
Line 462... Line 416...
462 */ 416 */
463 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>, 417 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
Line 464... Line 418...
464 <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>, 418 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
Line 477... Line 431...
477 * to avoid putting a node for it in the tree, so the numbers 431 * to avoid putting a node for it in the tree, so the numbers
478 * below are basically de-swizzled numbers. 432 * below are basically de-swizzled numbers.
479 * The real slot is on idsel 0, so the swizzling is 1:1 433 * The real slot is on idsel 0, so the swizzling is 1:1
480 */ 434 */
481 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 435 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
482 interrupt-map = 436 interrupt-map = <
483 <0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */ 437 0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH /* swizzled int A */
484 <0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */ 438 0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH /* swizzled int B */
485 <0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */ 439 0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH /* swizzled int C */
486 <0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */ 440 0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH /* swizzled int D */>;
-   441 status = "disabled";
-   442 };
-   443  
-   444 MSI: ppc4xx-msi@C10000000 {
-   445 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
-   446 reg = < 0xC 0x10000000 0x100
-   447 0xC 0x10000000 0x100>;
-   448 sdr-base = <0x36C>;
-   449 msi-data = <0x00004440>;
-   450 msi-mask = <0x0000ffe0>;
-   451 interrupts =<0 1 2 3 4 5 6 7>;
-   452 interrupt-parent = <&MSI>;
-   453 #interrupt-cells = <1>;
-   454 #address-cells = <0>;
-   455 #size-cells = <0>;
-   456 msi-available-ranges = <0x0 0x100>;
-   457 interrupt-map = <
-   458 0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING
-   459 1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING
-   460 2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING
-   461 3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING
-   462 4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING
-   463 5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING
-   464 6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING
-   465 7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING
-   466 >;
487 status = "disabled"; 467 status = "disabled";
488 }; 468 };
489 }; 469 };
490 }; 470 };