OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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Line 7... | Line 7... | |||
7 | |
7 | |
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8 | / { |
8 | / { |
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9 | compatible = "belkin,f5d8235-v2", "ralink,rt3052-soc"; |
9 | compatible = "belkin,f5d8235-v2", "ralink,rt3052-soc"; |
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Line 10... | Line -... | |||
10 | model = "Belkin F5D8235 v2"; |
- | ||
11 | |
- | ||
12 | aliases { |
- | ||
13 | led-boot = &led_router; |
- | ||
14 | led-failsafe = &led_router; |
- | ||
15 | led-running = &led_router; |
- | ||
16 | led-upgrade = &led_router; |
- | ||
17 | }; |
10 | model = "Belkin F5D8235 v2"; |
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18 | |
11 | |
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19 | cfi@1f000000 { |
12 | cfi@1f000000 { |
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20 | compatible = "cfi-flash"; |
13 | compatible = "cfi-flash"; |
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21 | reg = <0x1f000000 0x800000>; |
14 | reg = <0x1f000000 0x800000>; |
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22 | bank-width = <2>; |
- | ||
23 | device-width = <2>; |
- | ||
24 | |
- | ||
25 | partitions { |
15 | bank-width = <2>; |
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26 | compatible = "fixed-partitions"; |
16 | device-width = <2>; |
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Line 27... | Line 17... | |||
27 | #address-cells = <1>; |
17 | #address-cells = <1>; |
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28 | #size-cells = <1>; |
18 | #size-cells = <1>; |
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29 | |
19 | |
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30 | uboot: partition@0 { |
20 | uboot: partition@0 { |
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31 | label = "uboot"; |
21 | label = "uboot"; |
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Line 32... | Line 22... | |||
32 | reg = <0x0 0x50000>; |
22 | reg = <0x0 0x50000>; |
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33 | read-only; |
- | ||
34 | }; |
23 | read-only; |
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35 | |
24 | }; |
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36 | partition@50000 { |
25 | |
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Line 37... | Line 26... | |||
37 | compatible = "denx,uimage"; |
26 | partition@50000 { |
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Line 47... | Line 36... | |||
47 | factory: partition@7f0000 { |
36 | factory: partition@7f0000 { |
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48 | label = "factory"; |
37 | label = "factory"; |
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49 | reg = <0x7f0000 0x10000>; |
38 | reg = <0x7f0000 0x10000>; |
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50 | }; |
39 | }; |
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51 | }; |
40 | }; |
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52 | }; |
- | ||
Line 53... | Line 41... | |||
53 | |
41 | |
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54 | rtl8366rb { |
42 | rtl8366rb { |
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55 | compatible = "realtek,rtl8366rb"; |
43 | compatible = "realtek,rtl8366rb"; |
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56 | gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>; |
44 | gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>; |
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57 | gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>; |
45 | gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>; |
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Line 58... | Line 46... | |||
58 | }; |
46 | }; |
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59 | |
47 | |
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Line 60... | Line 48... | |||
60 | leds { |
48 | gpio-leds { |
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61 | compatible = "gpio-leds"; |
49 | compatible = "gpio-leds"; |
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62 | |
50 | |
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Line 78... | Line 66... | |||
78 | modem2 { |
66 | modem2 { |
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79 | label = "f5d8235-v2:amber:modem"; |
67 | label = "f5d8235-v2:amber:modem"; |
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80 | gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; |
68 | gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; |
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81 | }; |
69 | }; |
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Line 82... | Line 70... | |||
82 | |
70 | |
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83 | led_router: router { |
71 | router { |
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84 | label = "f5d8235-v2:blue:router"; |
72 | label = "f5d8235-v2:blue:router"; |
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85 | gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; |
73 | gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; |
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Line 86... | Line 74... | |||
86 | }; |
74 | }; |
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87 | |
75 | |
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88 | storage { |
76 | storage { |
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89 | label = "f5d8235-v2:blue:storage"; |
- | ||
90 | gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; |
- | ||
91 | trigger-sources = <&otg_port1>; |
77 | label = "f5d8235-v2:blue:storage"; |
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Line 92... | Line 78... | |||
92 | linux,default-trigger = "usbport"; |
78 | gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; |
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93 | }; |
79 | }; |
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94 | |
80 | |
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Line 110... | Line 96... | |||
110 | }; |
96 | }; |
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Line 111... | Line 97... | |||
111 | |
97 | |
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112 | &pinctrl { |
98 | &pinctrl { |
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113 | state_default: pinctrl0 { |
99 | state_default: pinctrl0 { |
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114 | gpio { |
100 | gpio { |
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115 | ralink,group = "spi", "i2c", "jtag", "mdio", "uartf"; |
101 | ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf"; |
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116 | ralink,function = "gpio"; |
102 | ralink,function = "gpio"; |
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117 | }; |
103 | }; |
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118 | }; |
104 | }; |
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Line 119... | Line 105... | |||
119 | }; |
105 | }; |
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120 | |
106 | |
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121 | ðernet { |
- | ||
122 | mtd-mac-address = <&uboot 0x40004>; |
- | ||
123 | pinctrl-names = "default"; |
107 | ðernet { |
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Line 124... | Line 108... | |||
124 | pinctrl-0 = <&rgmii_pins>; |
108 | mtd-mac-address = <&uboot 0x40004>; |
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125 | }; |
- | ||
126 | |
109 | }; |
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127 | &esw { |
- | ||
128 | ralink,rgmii = <1>; |
- | ||
129 | mediatek,portmap = <0x3f>; |
- | ||
130 | ralink,fct2 = <0x0002500c>; |
- | ||
131 | /* |
- | ||
132 | * ext phy base addr 31, rx/tx clock skew 0, |
- | ||
133 | * turbo mii off, rgmi 3.3v off, port 5 polling off |
- | ||
134 | * port5: enabled, gige, full-duplex, rx/tx-flow-control |
- | ||
135 | * port6: enabled, gige, full-duplex, rx/tx-flow-control |
110 | |
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Line 136... | Line 111... | |||
136 | */ |
111 | &esw { |
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137 | ralink,fpa2 = <0x1f003fff>; |
112 | mediatek,portmap = <0x3f>; |
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138 | }; |
113 | }; |