OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
1 /dts-v1/; 1 /dts-v1/;
2   2  
3 #include "mt7621.dtsi" 3 #include "mt7621.dtsi"
4   4  
5 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/input/input.h>
7   7  
8 / { 8 / {
9 compatible = "linksys,re6500", "mediatek,mt7621-soc"; 9 compatible = "linksys,re6500", "mediatek,mt7621-soc";
10 model = "Linksys RE6500"; 10 model = "Linksys RE6500";
11   -  
12 aliases { -  
13 led-boot = &led_power; -  
14 led-failsafe = &led_power; -  
15 led-running = &led_power; -  
16 led-upgrade = &led_power; -  
17 }; -  
18   11  
19 memory@0 { 12 memory@0 {
20 device_type = "memory"; 13 device_type = "memory";
21 reg = <0x0 0x4000000>; 14 reg = <0x0 0x4000000>;
22 }; 15 };
23   16  
24 chosen { 17 chosen {
25 bootargs = "console=ttyS0,57600"; 18 bootargs = "console=ttyS0,57600";
26 }; 19 };
27   20  
28 leds { 21 gpio-leds {
29 compatible = "gpio-leds"; 22 compatible = "gpio-leds";
30   23  
31 wifi { 24 wifi {
32 label = "re6500:orange:wifi"; 25 label = "re6500:orange:wifi";
33 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 26 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
34 }; 27 };
35   28  
36 led_power: power { 29 power {
37 label = "re6500:white:power"; 30 label = "re6500:white:power";
38 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; 31 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
39 }; 32 };
40 }; 33 };
41   34  
42 keys { 35 gpio-keys-polled {
-   36 compatible = "gpio-keys-polled";
-   37 #address-cells = <1>;
43 compatible = "gpio-keys-polled"; 38 #size-cells = <0>;
44 poll-interval = <20>; 39 poll-interval = <20>;
45   40  
46 wps { 41 wps {
47 label = "wps"; 42 label = "wps";
48 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 43 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_WPS_BUTTON>; 44 linux,code = <KEY_WPS_BUTTON>;
50 }; 45 };
51   46  
52 reset { 47 reset {
53 label = "reset"; 48 label = "reset";
54 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; 49 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
55 linux,code = <KEY_RESTART>; 50 linux,code = <KEY_RESTART>;
56 }; 51 };
57 }; 52 };
58 }; 53 };
59   54  
60 &spi0 { 55 &spi0 {
61 status = "okay"; 56 status = "okay";
62   57  
63 m25p80@0 { 58 m25p80@0 {
-   59 #address-cells = <1>;
-   60 #size-cells = <1>;
64 compatible = "jedec,spi-nor"; 61 compatible = "jedec,spi-nor";
65 reg = <0>; 62 reg = <0>;
66 spi-max-frequency = <10000000>; 63 spi-max-frequency = <10000000>;
-   64 m25p,chunked-io = <32>;
-   65  
-   66 partition@0 {
-   67 label = "u-boot";
-   68 reg = <0x0 0x30000>;
-   69 read-only;
-   70 };
-   71  
-   72 partition@30000 {
-   73 label = "u-boot-env";
-   74 reg = <0x30000 0x10000>;
-   75 read-only;
-   76 };
67   -  
68 partitions { -  
69 compatible = "fixed-partitions"; -  
70 #address-cells = <1>; -  
71 #size-cells = <1>; -  
72   -  
73 partition@0 { -  
74 label = "u-boot"; -  
75 reg = <0x0 0x30000>; -  
76 read-only; -  
77 }; -  
78   -  
79 partition@30000 { -  
80 label = "u-boot-env"; -  
81 reg = <0x30000 0x10000>; -  
82 read-only; -  
83 }; -  
84   77  
85 factory: partition@40000 { 78 factory: partition@40000 {
86 label = "factory"; 79 label = "factory";
87 reg = <0x40000 0x10000>; 80 reg = <0x40000 0x10000>;
88 read-only; 81 read-only;
89 }; 82 };
90   83  
91 partition@50000 { -  
92 compatible = "denx,uimage"; 84 partition@50000 {
93 label = "firmware"; 85 label = "firmware";
94 reg = <0x50000 0x7b0000>; -  
95 }; 86 reg = <0x50000 0x7b0000>;
96 }; 87 };
97 }; 88 };
98 }; 89 };
99   90  
100 &pinctrl { 91 &pinctrl {
101 state_default: pinctrl0 { 92 state_default: pinctrl0 {
102 gpio { 93 gpio {
103 ralink,group = "i2c", "uart2", "uart3", "rgmii2"; 94 ralink,group = "i2c", "uart2", "uart3", "rgmii2";
104 ralink,function = "gpio"; 95 ralink,function = "gpio";
105 }; 96 };
106 }; 97 };
107 }; 98 };
108   99  
109 &pcie { 100 &pcie {
110 status = "okay"; 101 status = "okay";
111 }; -  
112   102  
113 &pcie0 { 103 pcie0 {
114 mt76@0,0 { 104 mt76@0,0 {
-   105 reg = <0x0000 0 0 0 0>;
115 reg = <0x0000 0 0 0 0>; 106 device_type = "pci";
116 mediatek,mtd-eeprom = <&factory 0x0000>; 107 mediatek,mtd-eeprom = <&factory 0x0000>;
-   108 ieee80211-freq-limit = <5000000 6000000>;
117 ieee80211-freq-limit = <5000000 6000000>; 109 };
118 }; -  
119 }; 110 };
120   111  
121 &pcie1 { 112 pcie1 {
-   113 mt76@1,0 {
122 mt76@0,0 { 114 reg = <0x0000 0 0 0 0>;
123 reg = <0x0000 0 0 0 0>; 115 device_type = "pci";
-   116 mediatek,mtd-eeprom = <&factory 0x8000>;
124 mediatek,mtd-eeprom = <&factory 0x8000>; 117 ieee80211-freq-limit = <2400000 2500000>;
125 ieee80211-freq-limit = <2400000 2500000>; 118 };
126 }; 119 };
127 }; 120 };
128   121  
129 &ethernet { 122 &ethernet {
130 mtd-mac-address = <&factory 0x2e>; 123 mtd-mac-address = <&factory 0x2e>;
131 }; 124 };
132   125  
133 &xhci { 126 &xhci {
134 status = "disabled"; 127 status = "disabled";
135 }; 128 };
136   129