OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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1 | /dts-v1/; |
1 | /dts-v1/; |
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2 | |
2 | |
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3 | #include "mt7620a.dtsi" |
3 | #include "mt7620a.dtsi" |
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4 | |
4 | |
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5 | #include <dt-bindings/gpio/gpio.h> |
5 | #include <dt-bindings/gpio/gpio.h> |
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6 | #include <dt-bindings/input/input.h> |
6 | #include <dt-bindings/input/input.h> |
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7 | |
7 | |
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8 | / { |
8 | / { |
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9 | compatible = "dlink,dir-810l", "ralink,mt7620a-soc"; |
9 | compatible = "dlink,dir-810l", "ralink,mt7620a-soc"; |
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10 | model = "D-Link DIR-810L"; |
10 | model = "D-Link DIR-810L"; |
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11 | |
11 | |
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12 | aliases { |
- | ||
13 | led-boot = &led_power_green; |
- | ||
14 | led-failsafe = &led_power_green; |
- | ||
15 | led-running = &led_power_green; |
- | ||
16 | led-upgrade = &led_power_green; |
- | ||
17 | }; |
- | ||
18 | |
- | ||
19 | keys { |
12 | gpio-keys-polled { |
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- | 13 | compatible = "gpio-keys-polled"; |
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- | 14 | #address-cells = <1>; |
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20 | compatible = "gpio-keys-polled"; |
15 | #size-cells = <0>; |
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21 | poll-interval = <20>; |
16 | poll-interval = <20>; |
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22 | |
17 | |
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23 | reset { |
18 | reset { |
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24 | label = "reset"; |
19 | label = "reset"; |
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25 | gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; |
20 | gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; |
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26 | linux,code = <BTN_0>; |
21 | linux,code = <BTN_0>; |
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27 | }; |
22 | }; |
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28 | |
23 | |
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29 | wps { |
24 | wps { |
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30 | label = "wps"; |
25 | label = "wps"; |
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31 | gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
26 | gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; |
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32 | linux,code = <BTN_0>; |
27 | linux,code = <BTN_0>; |
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33 | }; |
28 | }; |
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34 | }; |
29 | }; |
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35 | |
30 | |
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36 | leds { |
31 | gpio-leds { |
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37 | compatible = "gpio-leds"; |
32 | compatible = "gpio-leds"; |
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38 | |
33 | |
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39 | led_power_green: power { |
34 | power { |
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40 | label = "dir-810l:green:power"; |
35 | label = "dir-810l:green:power"; |
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41 | gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; |
36 | gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; |
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42 | }; |
37 | }; |
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43 | |
38 | |
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44 | wan { |
39 | wan { |
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45 | label = "dir-810l:orange:wan"; |
40 | label = "dir-810l:orange:wan"; |
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46 | gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; |
41 | gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; |
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47 | }; |
42 | }; |
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48 | |
43 | |
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49 | power2 { |
44 | status { |
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50 | label = "dir-810l:orange:power"; |
45 | label = "dir-810l:orange:power"; |
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51 | gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; |
46 | gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; |
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52 | }; |
47 | }; |
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53 | }; |
48 | }; |
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54 | }; |
49 | }; |
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55 | |
50 | |
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56 | &spi0 { |
51 | &spi0 { |
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57 | status = "okay"; |
52 | status = "okay"; |
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58 | |
53 | |
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59 | m25p80@0 { |
54 | m25p80@0 { |
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- | 55 | #address-cells = <1>; |
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- | 56 | #size-cells = <1>; |
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60 | compatible = "jedec,spi-nor"; |
57 | compatible = "jedec,spi-nor"; |
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61 | reg = <0>; |
58 | reg = <0>; |
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62 | spi-max-frequency = <10000000>; |
59 | spi-max-frequency = <10000000>; |
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63 | |
- | ||
64 | partitions { |
- | ||
65 | compatible = "fixed-partitions"; |
- | ||
66 | #address-cells = <1>; |
- | ||
67 | #size-cells = <1>; |
- | ||
68 | |
60 | |
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69 | partition@0 { |
61 | partition@0 { |
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70 | label = "u-boot"; |
62 | label = "u-boot"; |
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71 | reg = <0x0 0x30000>; |
63 | reg = <0x0 0x30000>; |
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72 | read-only; |
64 | read-only; |
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73 | }; |
65 | }; |
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74 | |
66 | |
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75 | partition@30000 { |
67 | partition@30000 { |
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76 | label = "u-boot-env"; |
68 | label = "u-boot-env"; |
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77 | reg = <0x30000 0x10000>; |
69 | reg = <0x30000 0x10000>; |
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78 | read-only; |
70 | read-only; |
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79 | }; |
71 | }; |
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80 | |
72 | |
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81 | factory: partition@40000 { |
73 | factory: partition@40000 { |
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82 | label = "factory"; |
74 | label = "factory"; |
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83 | reg = <0x40000 0x10000>; |
75 | reg = <0x40000 0x10000>; |
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84 | read-only; |
76 | read-only; |
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85 | }; |
77 | }; |
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86 | |
78 | |
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87 | factory5g: partition@50000 { |
79 | factory5g: partition@50000 { |
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88 | label = "factory5g"; |
80 | label = "factory5g"; |
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89 | reg = <0x50000 0x10000>; |
81 | reg = <0x50000 0x10000>; |
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90 | read-only; |
82 | read-only; |
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91 | }; |
83 | }; |
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92 | |
84 | |
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93 | partition@60000 { |
85 | partition@60000 { |
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94 | label = "Wolf_Config"; |
86 | label = "Wolf_Config"; |
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95 | reg = <0x60000 0x10000>; |
87 | reg = <0x60000 0x10000>; |
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96 | read-only; |
88 | read-only; |
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97 | }; |
89 | }; |
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98 | |
90 | |
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99 | partition@70000 { |
91 | partition@70000 { |
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100 | label = "MyDlink"; |
92 | label = "MyDlink"; |
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101 | reg = <0x70000 0x80000>; |
93 | reg = <0x70000 0x80000>; |
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102 | read-only; |
94 | read-only; |
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103 | }; |
95 | }; |
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104 | |
96 | |
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105 | partition@e0000 { |
97 | partition@e0000 { |
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106 | label = "Jffs2"; |
98 | label = "Jffs2"; |
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107 | reg = <0xe0000 0x80000>; |
99 | reg = <0xe0000 0x80000>; |
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108 | read-only; |
100 | read-only; |
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109 | }; |
101 | }; |
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110 | |
102 | |
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111 | partition@170000 { |
- | ||
112 | compatible = "denx,uimage"; |
103 | partition@170000 { |
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113 | label = "firmware"; |
104 | label = "firmware"; |
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114 | reg = <0x170000 0x690000>; |
- | ||
115 | }; |
105 | reg = <0x170000 0x690000>; |
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116 | }; |
106 | }; |
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117 | }; |
107 | }; |
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118 | }; |
108 | }; |
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119 | |
109 | |
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120 | &pinctrl { |
110 | &pinctrl { |
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121 | state_default: pinctrl0 { |
111 | state_default: pinctrl0 { |
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122 | gpio { |
112 | gpio { |
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123 | ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf"; |
113 | ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf"; |
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124 | ralink,function = "gpio"; |
114 | ralink,function = "gpio"; |
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125 | }; |
115 | }; |
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126 | }; |
116 | }; |
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127 | }; |
117 | }; |
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128 | |
118 | |
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129 | ðernet { |
119 | ðernet { |
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130 | mtd-mac-address = <&factory 0x28>; |
120 | mtd-mac-address = <&factory 0x28>; |
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131 | mediatek,portmap = "llllw"; |
121 | mediatek,portmap = "llllw"; |
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132 | }; |
122 | }; |
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133 | |
123 | |
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134 | &gsw { |
124 | &gsw { |
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135 | mediatek,port4 = "ephy"; |
125 | mediatek,port4 = "ephy"; |
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136 | pinctrl-names = "default"; |
126 | pinctrl-names = "default"; |
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137 | pinctrl-0 = <&ephy_pins>; |
127 | pinctrl-0 = <&ephy_pins>; |
|
138 | }; |
128 | }; |
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139 | |
129 | |
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140 | &pcie { |
130 | &pcie { |
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141 | status = "okay"; |
131 | status = "okay"; |
|
142 | }; |
132 | }; |
|
143 | |
133 | |
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144 | &wmac { |
134 | &wmac { |
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145 | ralink,mtd-eeprom = <&factory 0>; |
135 | ralink,mtd-eeprom = <&factory 0>; |
|
146 | }; |
136 | }; |
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147 | |
- | ||
148 | &pcie0 { |
- | ||
149 | wifi@0,0 { |
- | ||
150 | reg = <0x0000 0 0 0 0>; |
- | ||
151 | mediatek,mtd-eeprom = <&factory 0x8000>; |
- | ||
152 | ieee80211-freq-limit = <5000000 6000000>; |
- | ||
153 | }; |
- | ||
154 | }; |
- | ||
155 | |
137 | |