OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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1 | #include "qcom-ipq8064-v2.0.dtsi" |
1 | #include "qcom-ipq8064-v2.0.dtsi" |
|
2 | |
2 | |
|
3 | #include <dt-bindings/input/input.h> |
3 | #include <dt-bindings/input/input.h> |
|
4 | |
4 | |
|
5 | / { |
5 | / { |
|
6 | model = "TP-Link Archer VR2600v"; |
6 | model = "TP-Link Archer VR2600v"; |
|
7 | compatible = "tplink,vr2600v", "qcom,ipq8064"; |
7 | compatible = "tplink,vr2600v", "qcom,ipq8064"; |
|
8 | |
8 | |
|
9 | memory@0 { |
9 | memory@0 { |
|
10 | reg = <0x42000000 0x1e000000>; |
10 | reg = <0x42000000 0x1e000000>; |
|
11 | device_type = "memory"; |
11 | device_type = "memory"; |
|
12 | }; |
12 | }; |
|
13 | |
13 | |
|
14 | reserved-memory { |
14 | reserved-memory { |
|
15 | #address-cells = <1>; |
15 | #address-cells = <1>; |
|
16 | #size-cells = <1>; |
16 | #size-cells = <1>; |
|
17 | ranges; |
17 | ranges; |
|
18 | rsvd@41200000 { |
18 | rsvd@41200000 { |
|
19 | reg = <0x41200000 0x300000>; |
19 | reg = <0x41200000 0x300000>; |
|
20 | no-map; |
20 | no-map; |
|
21 | }; |
21 | }; |
|
22 | }; |
22 | }; |
|
23 | |
23 | |
|
24 | aliases { |
24 | aliases { |
|
25 | serial0 = &gsbi4_serial; |
25 | serial0 = &gsbi4_serial; |
|
26 | mdio-gpio0 = &mdio0; |
26 | mdio-gpio0 = &mdio0; |
|
27 | |
27 | |
|
28 | led-boot = &power; |
28 | led-boot = &power; |
|
29 | led-failsafe = &general; |
29 | led-failsafe = &general; |
|
30 | led-running = &power; |
30 | led-running = &power; |
|
31 | led-upgrade = &general; |
31 | led-upgrade = &general; |
|
32 | }; |
32 | }; |
|
33 | |
33 | |
|
34 | chosen { |
34 | chosen { |
|
35 | stdout-path = "serial0:115200n8"; |
35 | linux,stdout-path = "serial0:115200n8"; |
|
36 | }; |
36 | }; |
|
37 | |
37 | |
|
38 | soc { |
38 | soc { |
|
39 | pinmux@800000 { |
39 | pinmux@800000 { |
|
40 | led_pins: led_pins { |
40 | led_pins: led_pins { |
|
41 | mux { |
41 | mux { |
|
42 | pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17", |
42 | pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17", |
|
43 | "gpio26", "gpio53", "gpio56", "gpio66"; |
43 | "gpio26", "gpio53", "gpio56", "gpio66"; |
|
44 | function = "gpio"; |
44 | function = "gpio"; |
|
45 | drive-strength = <2>; |
45 | drive-strength = <2>; |
|
46 | bias-pull-up; |
46 | bias-pull-up; |
|
47 | }; |
47 | }; |
|
48 | }; |
48 | }; |
|
49 | |
49 | |
|
50 | i2c4_pins: i2c4_pinmux { |
50 | i2c4_pins: i2c4_pinmux { |
|
51 | mux { |
51 | mux { |
|
52 | pins = "gpio12", "gpio13"; |
52 | pins = "gpio12", "gpio13"; |
|
53 | function = "gsbi4"; |
53 | function = "gsbi4"; |
|
54 | drive-strength = <12>; |
54 | drive-strength = <12>; |
|
55 | bias-disable; |
55 | bias-disable; |
|
56 | }; |
56 | }; |
|
57 | }; |
57 | }; |
|
58 | |
58 | |
|
59 | button_pins: button_pins { |
59 | button_pins: button_pins { |
|
60 | mux { |
60 | mux { |
|
61 | pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68"; |
61 | pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68"; |
|
62 | function = "gpio"; |
62 | function = "gpio"; |
|
63 | drive-strength = <2>; |
63 | drive-strength = <2>; |
|
64 | bias-pull-up; |
64 | bias-pull-up; |
|
65 | }; |
65 | }; |
|
66 | }; |
66 | }; |
|
67 | |
67 | |
|
68 | spi_pins: spi_pins { |
68 | spi_pins: spi_pins { |
|
69 | mux { |
69 | mux { |
|
70 | pins = "gpio18", "gpio19", "gpio21"; |
70 | pins = "gpio18", "gpio19", "gpio21"; |
|
71 | function = "gsbi5"; |
71 | function = "gsbi5"; |
|
72 | bias-pull-down; |
72 | bias-pull-down; |
|
73 | }; |
73 | }; |
|
74 | |
74 | |
|
75 | data { |
75 | data { |
|
76 | pins = "gpio18", "gpio19"; |
76 | pins = "gpio18", "gpio19"; |
|
77 | drive-strength = <10>; |
77 | drive-strength = <10>; |
|
78 | }; |
78 | }; |
|
79 | |
79 | |
|
80 | cs { |
80 | cs { |
|
81 | pins = "gpio20"; |
81 | pins = "gpio20"; |
|
82 | drive-strength = <10>; |
82 | drive-strength = <10>; |
|
83 | bias-pull-up; |
83 | bias-pull-up; |
|
84 | }; |
84 | }; |
|
85 | |
85 | |
|
86 | clk { |
86 | clk { |
|
87 | pins = "gpio21"; |
87 | pins = "gpio21"; |
|
88 | drive-strength = <12>; |
88 | drive-strength = <12>; |
|
89 | }; |
89 | }; |
|
90 | }; |
90 | }; |
|
91 | |
91 | |
|
92 | mdio0_pins: mdio0_pins { |
92 | mdio0_pins: mdio0_pins { |
|
93 | mux { |
93 | mux { |
|
94 | pins = "gpio0", "gpio1"; |
94 | pins = "gpio0", "gpio1"; |
|
95 | function = "gpio"; |
95 | function = "gpio"; |
|
96 | drive-strength = <8>; |
96 | drive-strength = <8>; |
|
97 | bias-disable; |
97 | bias-disable; |
|
98 | }; |
98 | }; |
|
99 | }; |
99 | }; |
|
100 | |
100 | |
|
101 | rgmii2_pins: rgmii2_pins { |
101 | rgmii2_pins: rgmii2_pins { |
|
102 | mux { |
102 | mux { |
|
103 | pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", |
103 | pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", |
|
104 | "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; |
104 | "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; |
|
105 | function = "rgmii2"; |
105 | function = "rgmii2"; |
|
106 | drive-strength = <8>; |
106 | drive-strength = <8>; |
|
107 | bias-disable; |
107 | bias-disable; |
|
108 | }; |
108 | }; |
|
109 | }; |
109 | }; |
|
110 | }; |
110 | }; |
|
111 | |
111 | |
|
112 | gsbi@16300000 { |
112 | gsbi@16300000 { |
|
113 | qcom,mode = <GSBI_PROT_I2C_UART>; |
113 | qcom,mode = <GSBI_PROT_I2C_UART>; |
|
114 | status = "ok"; |
114 | status = "ok"; |
|
115 | serial@16340000 { |
115 | serial@16340000 { |
|
116 | status = "ok"; |
116 | status = "ok"; |
|
117 | }; |
117 | }; |
|
118 | /* |
118 | /* |
|
119 | * The i2c device on gsbi4 should not be enabled. |
119 | * The i2c device on gsbi4 should not be enabled. |
|
120 | * On ipq806x designs gsbi4 i2c is meant for exclusive |
120 | * On ipq806x designs gsbi4 i2c is meant for exclusive |
|
121 | * RPM usage. Turning this on in kernel manifests as |
121 | * RPM usage. Turning this on in kernel manifests as |
|
122 | * i2c failure for the RPM. |
122 | * i2c failure for the RPM. |
|
123 | */ |
123 | */ |
|
124 | }; |
124 | }; |
|
125 | |
125 | |
|
126 | gsbi5: gsbi@1a200000 { |
126 | gsbi5: gsbi@1a200000 { |
|
127 | qcom,mode = <GSBI_PROT_SPI>; |
127 | qcom,mode = <GSBI_PROT_SPI>; |
|
128 | status = "ok"; |
128 | status = "ok"; |
|
129 | |
129 | |
|
130 | spi4: spi@1a280000 { |
130 | spi4: spi@1a280000 { |
|
131 | status = "ok"; |
131 | status = "ok"; |
|
132 | |
132 | |
|
133 | pinctrl-0 = <&spi_pins>; |
133 | pinctrl-0 = <&spi_pins>; |
|
134 | pinctrl-names = "default"; |
134 | pinctrl-names = "default"; |
|
135 | |
135 | |
|
136 | cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; |
136 | cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; |
|
137 | |
137 | |
|
138 | flash: W25Q128@0 { |
138 | flash: W25Q128@0 { |
|
139 | compatible = "jedec,spi-nor"; |
139 | compatible = "jedec,spi-nor"; |
|
140 | #address-cells = <1>; |
140 | #address-cells = <1>; |
|
141 | #size-cells = <1>; |
141 | #size-cells = <1>; |
|
142 | spi-max-frequency = <50000000>; |
142 | spi-max-frequency = <50000000>; |
|
143 | reg = <0>; |
143 | reg = <0>; |
|
144 | |
144 | |
|
145 | SBL1@0 { |
145 | SBL1@0 { |
|
146 | label = "SBL1"; |
146 | label = "SBL1"; |
|
147 | reg = <0x0 0x20000>; |
147 | reg = <0x0 0x20000>; |
|
148 | read-only; |
148 | read-only; |
|
149 | }; |
149 | }; |
|
150 | |
150 | |
|
151 | MIBIB@20000 { |
151 | MIBIB@20000 { |
|
152 | label = "MIBIB"; |
152 | label = "MIBIB"; |
|
153 | reg = <0x20000 0x20000>; |
153 | reg = <0x20000 0x20000>; |
|
154 | read-only; |
154 | read-only; |
|
155 | }; |
155 | }; |
|
156 | |
156 | |
|
157 | SBL2@40000 { |
157 | SBL2@40000 { |
|
158 | label = "SBL2"; |
158 | label = "SBL2"; |
|
159 | reg = <0x40000 0x40000>; |
159 | reg = <0x40000 0x40000>; |
|
160 | read-only; |
160 | read-only; |
|
161 | }; |
161 | }; |
|
162 | |
162 | |
|
163 | SBL3@80000 { |
163 | SBL3@80000 { |
|
164 | label = "SBL3"; |
164 | label = "SBL3"; |
|
165 | reg = <0x80000 0x80000>; |
165 | reg = <0x80000 0x80000>; |
|
166 | read-only; |
166 | read-only; |
|
167 | }; |
167 | }; |
|
168 | |
168 | |
|
169 | DDRCONFIG@100000 { |
169 | DDRCONFIG@100000 { |
|
170 | label = "DDRCONFIG"; |
170 | label = "DDRCONFIG"; |
|
171 | reg = <0x100000 0x10000>; |
171 | reg = <0x100000 0x10000>; |
|
172 | read-only; |
172 | read-only; |
|
173 | }; |
173 | }; |
|
174 | |
174 | |
|
175 | SSD@110000 { |
175 | SSD@110000 { |
|
176 | label = "SSD"; |
176 | label = "SSD"; |
|
177 | reg = <0x110000 0x10000>; |
177 | reg = <0x110000 0x10000>; |
|
178 | read-only; |
178 | read-only; |
|
179 | }; |
179 | }; |
|
180 | |
180 | |
|
181 | TZ@120000 { |
181 | TZ@120000 { |
|
182 | label = "TZ"; |
182 | label = "TZ"; |
|
183 | reg = <0x120000 0x80000>; |
183 | reg = <0x120000 0x80000>; |
|
184 | read-only; |
184 | read-only; |
|
185 | }; |
185 | }; |
|
186 | |
186 | |
|
187 | RPM@1a0000 { |
187 | RPM@1a0000 { |
|
188 | label = "RPM"; |
188 | label = "RPM"; |
|
189 | reg = <0x1a0000 0x80000>; |
189 | reg = <0x1a0000 0x80000>; |
|
190 | read-only; |
190 | read-only; |
|
191 | }; |
191 | }; |
|
192 | |
192 | |
|
193 | APPSBL@220000 { |
193 | APPSBL@220000 { |
|
194 | label = "APPSBL"; |
194 | label = "APPSBL"; |
|
195 | reg = <0x220000 0x80000>; |
195 | reg = <0x220000 0x80000>; |
|
196 | read-only; |
196 | read-only; |
|
197 | }; |
197 | }; |
|
198 | |
198 | |
|
199 | APPSBLENV@2a0000 { |
199 | APPSBLENV@2a0000 { |
|
200 | label = "APPSBLENV"; |
200 | label = "APPSBLENV"; |
|
201 | reg = <0x2a0000 0x40000>; |
201 | reg = <0x2a0000 0x40000>; |
|
202 | read-only; |
202 | read-only; |
|
203 | }; |
203 | }; |
|
204 | |
204 | |
|
205 | OLDART@2e0000 { |
205 | OLDART@2e0000 { |
|
206 | label = "OLDART"; |
206 | label = "OLDART"; |
|
207 | reg = <0x2e0000 0x40000>; |
207 | reg = <0x2e0000 0x40000>; |
|
208 | read-only; |
208 | read-only; |
|
209 | }; |
209 | }; |
|
210 | |
210 | |
|
211 | kernel@320000 { |
211 | kernel@320000 { |
|
212 | label = "kernel"; |
212 | label = "kernel"; |
|
213 | reg = <0x320000 0x300000>; |
213 | reg = <0x320000 0x300000>; |
|
214 | }; |
214 | }; |
|
215 | |
215 | |
|
216 | rootfs@620000 { |
216 | rootfs@620000 { |
|
217 | label = "rootfs"; |
217 | label = "rootfs"; |
|
218 | reg = <0x620000 0x960000>; |
218 | reg = <0x620000 0x960000>; |
|
219 | }; |
219 | }; |
|
220 | |
220 | |
|
221 | defaultmac: default-mac@0xfaf100 { |
221 | defaultmac: default-mac@0xfaf100 { |
|
222 | label = "default-mac"; |
222 | label = "default-mac"; |
|
223 | reg = <0xfaf100 0x00200>; |
223 | reg = <0xfaf100 0x00200>; |
|
224 | read-only; |
224 | read-only; |
|
225 | }; |
225 | }; |
|
226 | |
226 | |
|
227 | ART@fc0000 { |
227 | ART@fc0000 { |
|
228 | label = "ART"; |
228 | label = "ART"; |
|
229 | reg = <0xfc0000 0x40000>; |
229 | reg = <0xfc0000 0x40000>; |
|
230 | read-only; |
230 | read-only; |
|
231 | }; |
231 | }; |
|
232 | }; |
232 | }; |
|
233 | }; |
233 | }; |
|
234 | }; |
234 | }; |
|
235 | |
235 | |
|
236 | phy@100f8800 { /* USB3 port 1 HS phy */ |
236 | phy@100f8800 { /* USB3 port 1 HS phy */ |
|
237 | status = "ok"; |
237 | status = "ok"; |
|
238 | }; |
238 | }; |
|
239 | |
239 | |
|
240 | phy@100f8830 { /* USB3 port 1 SS phy */ |
240 | phy@100f8830 { /* USB3 port 1 SS phy */ |
|
241 | status = "ok"; |
241 | status = "ok"; |
|
242 | }; |
242 | }; |
|
243 | |
243 | |
|
244 | phy@110f8800 { /* USB3 port 0 HS phy */ |
244 | phy@110f8800 { /* USB3 port 0 HS phy */ |
|
245 | status = "ok"; |
245 | status = "ok"; |
|
246 | }; |
246 | }; |
|
247 | |
247 | |
|
248 | phy@110f8830 { /* USB3 port 0 SS phy */ |
248 | phy@110f8830 { /* USB3 port 0 SS phy */ |
|
249 | status = "ok"; |
249 | status = "ok"; |
|
250 | }; |
250 | }; |
|
251 | |
251 | |
|
252 | usb30@0 { |
252 | usb30@0 { |
|
253 | status = "ok"; |
253 | status = "ok"; |
|
254 | }; |
254 | }; |
|
255 | |
255 | |
|
256 | usb30@1 { |
256 | usb30@1 { |
|
257 | status = "ok"; |
257 | status = "ok"; |
|
258 | }; |
258 | }; |
|
259 | |
259 | |
|
260 | pcie0: pci@1b500000 { |
260 | pcie0: pci@1b500000 { |
|
261 | status = "ok"; |
261 | status = "ok"; |
|
262 | }; |
262 | }; |
|
263 | |
263 | |
|
264 | pcie1: pci@1b700000 { |
264 | pcie1: pci@1b700000 { |
|
265 | status = "ok"; |
265 | status = "ok"; |
|
266 | force_gen1 = <1>; |
266 | force_gen1 = <1>; |
|
267 | }; |
267 | }; |
|
268 | |
268 | |
|
269 | mdio0: mdio { |
269 | mdio0: mdio { |
|
270 | compatible = "virtual,mdio-gpio"; |
270 | compatible = "virtual,mdio-gpio"; |
|
271 | #address-cells = <1>; |
271 | #address-cells = <1>; |
|
272 | #size-cells = <0>; |
272 | #size-cells = <0>; |
|
273 | gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; |
273 | gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; |
|
274 | pinctrl-0 = <&mdio0_pins>; |
274 | pinctrl-0 = <&mdio0_pins>; |
|
275 | pinctrl-names = "default"; |
275 | pinctrl-names = "default"; |
|
276 | |
276 | |
|
277 | phy0: ethernet-phy@0 { |
277 | phy0: ethernet-phy@0 { |
|
- | 278 | device_type = "ethernet-phy"; |
||
278 | reg = <0>; |
279 | reg = <0>; |
|
279 | qca,ar8327-initvals = < |
280 | qca,ar8327-initvals = < |
|
280 | 0x00004 0x7600000 /* PAD0_MODE */ |
281 | 0x00004 0x7600000 /* PAD0_MODE */ |
|
281 | 0x00008 0x1000000 /* PAD5_MODE */ |
282 | 0x00008 0x1000000 /* PAD5_MODE */ |
|
282 | 0x0000c 0x80 /* PAD6_MODE */ |
283 | 0x0000c 0x80 /* PAD6_MODE */ |
|
283 | 0x000e4 0x6a545 /* MAC_POWER_SEL */ |
284 | 0x000e4 0x6a545 /* MAC_POWER_SEL */ |
|
284 | 0x000e0 0xc74164de /* SGMII_CTRL */ |
285 | 0x000e0 0xc74164de /* SGMII_CTRL */ |
|
285 | 0x0007c 0x4e /* PORT0_STATUS */ |
286 | 0x0007c 0x4e /* PORT0_STATUS */ |
|
286 | 0x00094 0x4e /* PORT6_STATUS */ |
287 | 0x00094 0x4e /* PORT6_STATUS */ |
|
287 | >; |
288 | >; |
|
288 | }; |
289 | }; |
|
289 | |
290 | |
|
290 | phy4: ethernet-phy@4 { |
291 | phy4: ethernet-phy@4 { |
|
- | 292 | device_type = "ethernet-phy"; |
||
291 | reg = <4>; |
293 | reg = <4>; |
|
292 | }; |
294 | }; |
|
293 | }; |
295 | }; |
|
294 | |
296 | |
|
295 | gmac1: ethernet@37200000 { |
297 | gmac1: ethernet@37200000 { |
|
296 | status = "ok"; |
298 | status = "ok"; |
|
297 | phy-mode = "rgmii"; |
299 | phy-mode = "rgmii"; |
|
298 | qcom,id = <1>; |
300 | qcom,id = <1>; |
|
299 | |
301 | |
|
300 | pinctrl-0 = <&rgmii2_pins>; |
302 | pinctrl-0 = <&rgmii2_pins>; |
|
301 | pinctrl-names = "default"; |
303 | pinctrl-names = "default"; |
|
302 | |
304 | |
|
303 | mtd-mac-address = <&defaultmac 0>; |
305 | mtd-mac-address = <&defaultmac 0>; |
|
304 | mtd-mac-address-increment = <1>; |
306 | mtd-mac-address-increment = <1>; |
|
305 | |
307 | |
|
306 | fixed-link { |
308 | fixed-link { |
|
307 | speed = <1000>; |
309 | speed = <1000>; |
|
308 | full-duplex; |
310 | full-duplex; |
|
309 | }; |
311 | }; |
|
310 | }; |
312 | }; |
|
311 | |
313 | |
|
312 | gmac2: ethernet@37400000 { |
314 | gmac2: ethernet@37400000 { |
|
313 | status = "ok"; |
315 | status = "ok"; |
|
314 | phy-mode = "sgmii"; |
316 | phy-mode = "sgmii"; |
|
315 | qcom,id = <2>; |
317 | qcom,id = <2>; |
|
316 | |
318 | |
|
317 | mtd-mac-address = <&defaultmac 0>; |
319 | mtd-mac-address = <&defaultmac 0>; |
|
318 | |
320 | |
|
319 | fixed-link { |
321 | fixed-link { |
|
320 | speed = <1000>; |
322 | speed = <1000>; |
|
321 | full-duplex; |
323 | full-duplex; |
|
322 | }; |
324 | }; |
|
323 | }; |
325 | }; |
|
324 | }; |
326 | }; |
|
325 | |
327 | |
|
326 | keys { |
328 | gpio-keys { |
|
327 | compatible = "gpio-keys"; |
329 | compatible = "gpio-keys"; |
|
328 | pinctrl-0 = <&button_pins>; |
330 | pinctrl-0 = <&button_pins>; |
|
329 | pinctrl-names = "default"; |
331 | pinctrl-names = "default"; |
|
330 | |
332 | |
|
331 | wifi { |
333 | wifi { |
|
332 | label = "wifi"; |
334 | label = "wifi"; |
|
333 | gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; |
335 | gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; |
|
334 | linux,code = <KEY_RFKILL>; |
336 | linux,code = <KEY_RFKILL>; |
|
335 | }; |
337 | }; |
|
336 | |
338 | |
|
337 | reset { |
339 | reset { |
|
338 | label = "reset"; |
340 | label = "reset"; |
|
339 | gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; |
341 | gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; |
|
340 | linux,code = <KEY_RESTART>; |
342 | linux,code = <KEY_RESTART>; |
|
341 | }; |
343 | }; |
|
342 | |
344 | |
|
343 | wps { |
345 | wps { |
|
344 | label = "wps"; |
346 | label = "wps"; |
|
345 | gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; |
347 | gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; |
|
346 | linux,code = <KEY_WPS_BUTTON>; |
348 | linux,code = <KEY_WPS_BUTTON>; |
|
347 | }; |
349 | }; |
|
348 | |
350 | |
|
349 | dect { |
351 | dect { |
|
350 | label = "dect"; |
352 | label = "dect"; |
|
351 | gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; |
353 | gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; |
|
352 | linux,code = <KEY_PHONE>; |
354 | linux,code = <KEY_PHONE>; |
|
353 | }; |
355 | }; |
|
354 | |
356 | |
|
355 | ledswitch { |
357 | ledswitch { |
|
356 | label = "ledswitch"; |
358 | label = "ledswitch"; |
|
357 | gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; |
359 | gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; |
|
358 | linux,code = <KEY_LIGHTS_TOGGLE>; |
360 | linux,code = <KEY_LIGHTS_TOGGLE>; |
|
359 | }; |
361 | }; |
|
360 | }; |
362 | }; |
|
361 | |
363 | |
|
362 | leds { |
364 | gpio-leds { |
|
363 | compatible = "gpio-leds"; |
365 | compatible = "gpio-leds"; |
|
364 | pinctrl-0 = <&led_pins>; |
366 | pinctrl-0 = <&led_pins>; |
|
365 | pinctrl-names = "default"; |
367 | pinctrl-names = "default"; |
|
366 | |
368 | |
|
367 | dsl { |
369 | dsl { |
|
368 | label = "vr2600v:white:dsl"; |
370 | label = "vr2600v:white:dsl"; |
|
369 | gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; |
371 | gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; |
|
370 | }; |
372 | }; |
|
371 | |
373 | |
|
372 | usb { |
374 | usb { |
|
373 | label = "vr2600v:white:usb"; |
375 | label = "vr2600v:white:usb"; |
|
374 | gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; |
376 | gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; |
|
375 | }; |
377 | }; |
|
376 | |
378 | |
|
377 | lan { |
379 | lan { |
|
378 | label = "vr2600v:white:lan"; |
380 | label = "vr2600v:white:lan"; |
|
379 | gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; |
381 | gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; |
|
380 | }; |
382 | }; |
|
381 | |
383 | |
|
382 | wlan2g { |
384 | wlan2g { |
|
383 | label = "vr2600v:white:wlan2g"; |
385 | label = "vr2600v:white:wlan2g"; |
|
384 | gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; |
386 | gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; |
|
385 | }; |
387 | }; |
|
386 | |
388 | |
|
387 | wlan5g { |
389 | wlan5g { |
|
388 | label = "vr2600v:white:wlan5g"; |
390 | label = "vr2600v:white:wlan5g"; |
|
389 | gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>; |
391 | gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>; |
|
390 | }; |
392 | }; |
|
391 | |
393 | |
|
392 | power: power { |
394 | power: power { |
|
393 | label = "vr2600v:white:power"; |
395 | label = "vr2600v:white:power"; |
|
394 | gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; |
396 | gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; |
|
395 | default-state = "keep"; |
397 | default-state = "keep"; |
|
396 | }; |
398 | }; |
|
397 | |
399 | |
|
398 | phone { |
400 | phone { |
|
399 | label = "vr2600v:white:phone"; |
401 | label = "vr2600v:white:phone"; |
|
400 | gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; |
402 | gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; |
|
401 | }; |
403 | }; |
|
402 | |
404 | |
|
403 | wan { |
405 | wan { |
|
404 | label = "vr2600v:white:wan"; |
406 | label = "vr2600v:white:wan"; |
|
405 | gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; |
407 | gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; |
|
406 | }; |
408 | }; |
|
407 | |
409 | |
|
408 | general: general { |
410 | general: general { |
|
409 | label = "vr2600v:white:general"; |
411 | label = "vr2600v:white:general"; |
|
410 | gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; |
412 | gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; |
|
411 | }; |
413 | }; |
|
412 | }; |
414 | }; |
|
413 | }; |
415 | }; |
|
414 | |
416 | |
|
415 | &adm_dma { |
417 | &adm_dma { |
|
416 | status = "ok"; |
418 | status = "ok"; |
|
417 | }; |
419 | }; |
|
418 | |
420 | |