OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
1 From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001 1 From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
2 From: Maxime Bizon <mbizon@freebox.fr> 2 From: Maxime Bizon <mbizon@freebox.fr>
3 Date: Wed, 20 Jan 2010 16:21:30 +0100 3 Date: Wed, 20 Jan 2010 16:21:30 +0100
4 Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. 4 Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
5   5  
6 --- 6 ---
7 arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++ 7 arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
8 .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 + 8 .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
9 2 files changed, 97 insertions(+), 0 deletions(-) 9 2 files changed, 97 insertions(+), 0 deletions(-)
10   10  
11 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c 11 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
12 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c 12 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
13 @@ -792,6 +792,58 @@ static struct board_info __initdata boar 13 @@ -840,6 +840,58 @@ static struct board_info __initdata boar
14 #endif /* CONFIG_BCM63XX_CPU_6358 */ 14 #endif /* CONFIG_BCM63XX_CPU_6358 */
15 15
16 /* 16 /*
17 + * known 6368 boards 17 + * known 6368 boards
18 + */ 18 + */
19 +#ifdef CONFIG_BCM63XX_CPU_6368 19 +#ifdef CONFIG_BCM63XX_CPU_6368
20 +static struct board_info __initdata board_96368mvwg = { 20 +static struct board_info __initdata board_96368mvwg = {
21 + .name = "96368MVWG", 21 + .name = "96368MVWG",
22 + .expected_cpu_id = 0x6368, 22 + .expected_cpu_id = 0x6368,
23 + 23 +
24 + .has_pci = 1, 24 + .has_pci = 1,
25 + 25 +
26 + .has_usbd = 1, 26 + .has_usbd = 1,
27 + 27 +
28 + .usbd = { 28 + .usbd = {
29 + .use_fullspeed = 0, 29 + .use_fullspeed = 0,
30 + .port_no = 0, 30 + .port_no = 0,
31 + }, 31 + },
32 + 32 +
33 + .has_enetsw = 1, 33 + .has_enetsw = 1,
34 + 34 +
35 + .enetsw = { 35 + .enetsw = {
36 + .used_ports = { 36 + .used_ports = {
37 + [1] = { 37 + [1] = {
38 + .used = 1, 38 + .used = 1,
39 + .phy_id = 2, 39 + .phy_id = 2,
40 + .name = "port1", 40 + .name = "port1",
41 + }, 41 + },
42 + 42 +
43 + [2] = { 43 + [2] = {
44 + .used = 1, 44 + .used = 1,
45 + .phy_id = 3, 45 + .phy_id = 3,
46 + .name = "port2", 46 + .name = "port2",
47 + }, 47 + },
48 + 48 +
49 + [4] = { 49 + [4] = {
50 + .used = 1, 50 + .used = 1,
51 + .phy_id = 0x12, 51 + .phy_id = 0x12,
52 + .name = "port0", 52 + .name = "port0",
53 + }, 53 + },
54 + 54 +
55 + [5] = { 55 + [5] = {
56 + .used = 1, 56 + .used = 1,
57 + .phy_id = 0x11, 57 + .phy_id = 0x11,
58 + .name = "port3", 58 + .name = "port3",
59 + }, 59 + },
60 + }, 60 + },
61 + }, 61 + },
62 + 62 +
63 + .has_ohci0 = 1, 63 + .has_ohci0 = 1,
64 + .has_ehci0 = 1, 64 + .has_ehci0 = 1,
65 +}; 65 +};
66 +#endif /* CONFIG_BCM63XX_CPU_6368 */ 66 +#endif /* CONFIG_BCM63XX_CPU_6368 */
67 + 67 +
68 +/* 68 +/*
69 * all boards 69 * all boards
70 */ 70 */
71 static const struct board_info __initconst *bcm963xx_boards[] = { 71 static const struct board_info __initconst *bcm963xx_boards[] = {
72 @@ -843,6 +895,10 @@ static const struct board_info __initcon 72 @@ -891,6 +943,10 @@ static const struct board_info __initcon
73 &board_HW553, 73 &board_HW553,
74 &board_spw303v, 74 &board_spw303v,
75 #endif 75 #endif
76 + 76 +
77 +#ifdef CONFIG_BCM63XX_CPU_6368 77 +#ifdef CONFIG_BCM63XX_CPU_6368
78 + &board_96368mvwg, 78 + &board_96368mvwg,
79 +#endif 79 +#endif
80 }; 80 };
81 81
82 static struct of_device_id const bcm963xx_boards_dt[] = { 82 static struct of_device_id const bcm963xx_boards_dt[] = {
83 @@ -903,6 +959,7 @@ static struct of_device_id const bcm963x 83 @@ -951,6 +1007,7 @@ static struct of_device_id const bcm963x
84 { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, 84 { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
85 #endif 85 #endif
86 #ifdef CONFIG_BCM63XX_CPU_6368 86 #ifdef CONFIG_BCM63XX_CPU_6368
87 + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, 87 + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
88 #endif 88 #endif
89 #ifdef CONFIG_BCM63XX_CPU_63268 89 #ifdef CONFIG_BCM63XX_CPU_63268
90 #endif 90 #endif
91 --- a/arch/mips/bcm63xx/boards/board_common.c 91 --- a/arch/mips/bcm63xx/boards/board_common.c
92 +++ b/arch/mips/bcm63xx/boards/board_common.c 92 +++ b/arch/mips/bcm63xx/boards/board_common.c
93 @@ -81,12 +81,25 @@ void __init board_early_setup(const stru 93 @@ -82,12 +82,25 @@ void __init board_early_setup(const stru
94 bcm63xx_pci_enabled = 1; 94 bcm63xx_pci_enabled = 1;
95 if (BCMCPU_IS_6348()) 95 if (BCMCPU_IS_6348())
96 val |= GPIO_MODE_6348_G2_PCI; 96 val |= GPIO_MODE_6348_G2_PCI;
97 + 97 +
98 + if (BCMCPU_IS_6368()) 98 + if (BCMCPU_IS_6368())
99 + val |= GPIO_MODE_6368_PCI_REQ1 | 99 + val |= GPIO_MODE_6368_PCI_REQ1 |
100 + GPIO_MODE_6368_PCI_GNT1 | 100 + GPIO_MODE_6368_PCI_GNT1 |
101 + GPIO_MODE_6368_PCI_INTB | 101 + GPIO_MODE_6368_PCI_INTB |
102 + GPIO_MODE_6368_PCI_REQ0 | 102 + GPIO_MODE_6368_PCI_REQ0 |
103 + GPIO_MODE_6368_PCI_GNT0; 103 + GPIO_MODE_6368_PCI_GNT0;
104 } 104 }
105 #endif 105 #endif
106 106
107 if (board.has_pccard) { 107 if (board.has_pccard) {
108 if (BCMCPU_IS_6348()) 108 if (BCMCPU_IS_6348())
109 val |= GPIO_MODE_6348_G1_MII_PCCARD; 109 val |= GPIO_MODE_6348_G1_MII_PCCARD;
110 + 110 +
111 + if (BCMCPU_IS_6368()) 111 + if (BCMCPU_IS_6368())
112 + val |= GPIO_MODE_6368_PCMCIA_CD1 | 112 + val |= GPIO_MODE_6368_PCMCIA_CD1 |
113 + GPIO_MODE_6368_PCMCIA_CD2 | 113 + GPIO_MODE_6368_PCMCIA_CD2 |
114 + GPIO_MODE_6368_PCMCIA_VS1 | 114 + GPIO_MODE_6368_PCMCIA_VS1 |
115 + GPIO_MODE_6368_PCMCIA_VS2; 115 + GPIO_MODE_6368_PCMCIA_VS2;
116 } 116 }
117 117
118 if (board.has_enet0 && !board.enet0.use_internal_phy) { 118 if (board.has_enet0 && !board.enet0.use_internal_phy) {
119   119