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1 /* 1 /*
2 * Abicom International Scorpion SC450 support. 2 * Abicom International Scorpion SC450 support.
3 * 3 *
4 * Copyright (c) 2012 Qualcomm Atheros 4 * Copyright (c) 2012 Qualcomm Atheros
5 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> 5 * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (c) 2017 Conor O'Gorman <i@conorogorman.net> 6 * Copyright (c) 2017 Conor O'Gorman <i@conorogorman.net>
7 * 7 *
8 * Permission to use, copy, modify, and/or distribute this software for any 8 * Permission to use, copy, modify, and/or distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above 9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies. 10 * copyright notice and this permission notice appear in all copies.
11 * 11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 * 19 *
20 */ 20 */
21   21  
22 #include <linux/platform_device.h> 22 #include <linux/platform_device.h>
23 #include <linux/platform_data/phy-at803x.h> 23 #include <linux/platform_data/phy-at803x.h>
24   24  
25 #include <asm/mach-ath79/ar71xx_regs.h> 25 #include <asm/mach-ath79/ar71xx_regs.h>
26   26  
27 #include "common.h" 27 #include "common.h"
28 #include "pci.h" 28 #include "pci.h"
29 #include "dev-ap9x-pci.h" 29 #include "dev-ap9x-pci.h"
30 #include "dev-gpio-buttons.h" 30 #include "dev-gpio-buttons.h"
31 #include "dev-eth.h" 31 #include "dev-eth.h"
32 #include "dev-leds-gpio.h" 32 #include "dev-leds-gpio.h"
33 #include "dev-m25p80.h" 33 #include "dev-m25p80.h"
34 #include "dev-nfc.h" 34 #include "dev-nfc.h"
35 #include "dev-usb.h" 35 #include "dev-usb.h"
36 #include "dev-wmac.h" 36 #include "dev-wmac.h"
37 #include "machtypes.h" 37 #include "machtypes.h"
38   38  
39 #define SC450_GPIO_LED_POWER 13 39 #define SC450_GPIO_LED_POWER 13
40 #define SC450_GPIO_LED_ERR1 14 40 #define SC450_GPIO_LED_ERR1 14
41 #define SC450_GPIO_LED_ERR2 15 41 #define SC450_GPIO_LED_ERR2 15
42 #define SC450_GPIO_LED_WLAN 16 42 #define SC450_GPIO_LED_WLAN 16
43 #define SC450_GPIO_BTN_RESET 17 43 #define SC450_GPIO_BTN_RESET 17
44 #define SC450_GPIO_WP 18 44 #define SC450_GPIO_WP 18
45 #define SC450_GPIO_POE 19 45 #define SC450_GPIO_POE 19
46 #define SC450_GPIO_RX_LOS 20 46 #define SC450_GPIO_RX_LOS 20
47 #define SC450_GPIO_MOD_GND 21 47 #define SC450_GPIO_MOD_GND 21
48 #define SC450_GPIO_MOD_SCL 22 48 #define SC450_GPIO_MOD_SCL 22
49 #define SC450_GPIO_MOD_SDA 23 49 #define SC450_GPIO_MOD_SDA 23
50   50  
51 #define SC450_KEYS_POLL_INTERVAL 20 /* msecs */ 51 #define SC450_KEYS_POLL_INTERVAL 20 /* msecs */
52 #define SC450_KEYS_DEBOUNCE_INTERVAL (3 * SC450_KEYS_POLL_INTERVAL) 52 #define SC450_KEYS_DEBOUNCE_INTERVAL (3 * SC450_KEYS_POLL_INTERVAL)
53   53  
54 #define SC450_MAC0_OFFSET 0 54 #define SC450_MAC0_OFFSET 0
55 #define SC450_MAC1_OFFSET 6 55 #define SC450_MAC1_OFFSET 6
56 #define SC450_WMAC_CALDATA_OFFSET 0x1000 56 #define SC450_WMAC_CALDATA_OFFSET 0x1000
57 #define SC450_PCIE_CALDATA_OFFSET 0x5000 57 #define SC450_PCIE_CALDATA_OFFSET 0x5000
58   58  
59 static struct gpio_led sc450_leds_gpio[] __initdata = { 59 static struct gpio_led sc450_leds_gpio[] __initdata = {
60 { 60 {
61 .name = "sc450:green:power", 61 .name = "sc450:green:power",
62 .gpio = SC450_GPIO_LED_POWER, 62 .gpio = SC450_GPIO_LED_POWER,
63 .active_low = 1, 63 .active_low = 1,
64 }, 64 },
65 { 65 {
66 .name = "sc450:red:power", 66 .name = "sc450:red:power",
67 .gpio = SC450_GPIO_LED_ERR1, 67 .gpio = SC450_GPIO_LED_ERR1,
68 .active_low = 1, 68 .active_low = 1,
69 }, 69 },
70 { 70 {
71 .name = "sc450:green:wlan", 71 .name = "sc450:green:wlan",
72 .gpio = SC450_GPIO_LED_WLAN, 72 .gpio = SC450_GPIO_LED_WLAN,
73 .active_low = 1, 73 .active_low = 1,
74 }, 74 },
75 { 75 {
76 .name = "sc450:red:wlan", 76 .name = "sc450:red:wlan",
77 .gpio = SC450_GPIO_LED_ERR2, 77 .gpio = SC450_GPIO_LED_ERR2,
78 .active_low = 1, 78 .active_low = 1,
79 } 79 }
80 }; 80 };
81   81  
82 static struct gpio_keys_button sc450_gpio_keys[] __initdata = { 82 static struct gpio_keys_button sc450_gpio_keys[] __initdata = {
83 { 83 {
84 .desc = "reset", 84 .desc = "reset",
85 .type = EV_KEY, 85 .type = EV_KEY,
86 .code = KEY_RESTART, 86 .code = KEY_RESTART,
87 .debounce_interval = SC450_KEYS_DEBOUNCE_INTERVAL, 87 .debounce_interval = SC450_KEYS_DEBOUNCE_INTERVAL,
88 .gpio = SC450_GPIO_BTN_RESET, 88 .gpio = SC450_GPIO_BTN_RESET,
89 .active_low = 1, 89 .active_low = 1,
90 } 90 }
91 }; 91 };
92   92  
93 static struct at803x_platform_data at803x_data = { 93 static struct at803x_platform_data at803x_data = {
94 .disable_smarteee = 1, 94 .disable_smarteee = 1,
95 .enable_rgmii_rx_delay = 0, 95 .enable_rgmii_rx_delay = 0,
96 .enable_rgmii_tx_delay = 0, 96 .enable_rgmii_tx_delay = 0,
97 }; 97 };
98   98  
99 static struct mdio_board_info sc450_mdio0_info[] = { 99 static struct mdio_board_info sc450_mdio0_info[] = {
100 { 100 {
101 .bus_id = "ag71xx-mdio.0", 101 .bus_id = "ag71xx-mdio.0",
102 .mdio_addr = 1, 102 .phy_addr = 1,
103 .platform_data = &at803x_data, 103 .platform_data = &at803x_data,
104 }, 104 },
105 }; 105 };
106   106  
107 static void __init sc450_setup(void) 107 static void __init sc450_setup(void)
108 { 108 {
109 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); 109 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
110   110  
111 ath79_register_m25p80(NULL); 111 ath79_register_m25p80(NULL);
112   112  
113 ath79_register_leds_gpio(-1, ARRAY_SIZE(sc450_leds_gpio), 113 ath79_register_leds_gpio(-1, ARRAY_SIZE(sc450_leds_gpio),
114 sc450_leds_gpio); 114 sc450_leds_gpio);
115 ath79_register_gpio_keys_polled(-1, SC450_KEYS_POLL_INTERVAL, 115 ath79_register_gpio_keys_polled(-1, SC450_KEYS_POLL_INTERVAL,
116 ARRAY_SIZE(sc450_gpio_keys), 116 ARRAY_SIZE(sc450_gpio_keys),
117 sc450_gpio_keys); 117 sc450_gpio_keys);
118   118  
119 ath79_register_usb(); 119 ath79_register_usb();
120 ath79_register_nfc(); 120 ath79_register_nfc();
121   121  
122 ath79_register_wmac(art + SC450_WMAC_CALDATA_OFFSET, NULL); 122 ath79_register_wmac(art + SC450_WMAC_CALDATA_OFFSET, NULL);
123   123  
124 ath79_register_mdio(0, 0); 124 ath79_register_mdio(0, 0);
125 mdiobus_register_board_info(sc450_mdio0_info, 125 mdiobus_register_board_info(sc450_mdio0_info,
126 ARRAY_SIZE(sc450_mdio0_info)); 126 ARRAY_SIZE(sc450_mdio0_info));
127   127  
128 ath79_init_mac(ath79_eth0_data.mac_addr, art + SC450_MAC0_OFFSET, 0); 128 ath79_init_mac(ath79_eth0_data.mac_addr, art + SC450_MAC0_OFFSET, 0);
129   129  
130 ath79_eth0_pll_data.pll_1000 = 0xa6000101; 130 ath79_eth0_pll_data.pll_1000 = 0xa6000101;
131 ath79_eth0_pll_data.pll_100 = 0xa4000101; 131 ath79_eth0_pll_data.pll_100 = 0xa4000101;
132 /* GMAC0 is connected to the RMGII interface */ 132 /* GMAC0 is connected to the RMGII interface */
133 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; 133 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
134 ath79_eth0_data.phy_mask = 0xF; 134 ath79_eth0_data.phy_mask = 0xF;
135 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; 135 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
136   136  
137 ath79_register_eth(0); 137 ath79_register_eth(0);
138   138  
139 /* GMAC1 is connected to the SGMII interface */ 139 /* GMAC1 is connected to the SGMII interface */
140 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; 140 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
141 ath79_eth1_data.speed = SPEED_1000; 141 ath79_eth1_data.speed = SPEED_1000;
142 ath79_eth1_data.duplex = DUPLEX_FULL; 142 ath79_eth1_data.duplex = DUPLEX_FULL;
143   143  
144 ath79_register_eth(1); 144 ath79_register_eth(1);
145   145  
146 ath79_register_pci(); 146 ath79_register_pci();
147 } 147 }
148   148  
149 MIPS_MACHINE(ATH79_MACH_SC450, "SC450", "Abicom SC450", sc450_setup); 149 MIPS_MACHINE(ATH79_MACH_SC450, "SC450", "Abicom SC450", sc450_setup);
150   150