OpenWrt – Diff between revs 2 and 3
?pathlinks?
Rev 2 | Rev 3 | |||
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1 | #include "rt5350.dtsi" |
1 | #include "rt5350.dtsi" |
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2 | |
2 | |
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3 | / { |
3 | / { |
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4 | compatible = "olimex,rt5350f-olinuxino", "ralink,rt5350-soc"; |
4 | compatible = "olimex,rt5350f-olinuxino", "ralink,rt5350-soc"; |
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5 | |
5 | |
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6 | aliases { |
6 | aliases { |
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7 | serial0 = &uartlite; |
7 | serial0 = &uartlite; |
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8 | serial1 = &uart; |
8 | serial1 = &uart; |
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9 | }; |
9 | }; |
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10 | }; |
10 | }; |
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11 | |
11 | |
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12 | |
12 | |
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13 | &spi0 { |
13 | &spi0 { |
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14 | status = "okay"; |
14 | status = "okay"; |
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15 | |
15 | |
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16 | m25p80@0 { |
16 | m25p80@0 { |
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- | 17 | #address-cells = <1>; |
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- | 18 | #size-cells = <1>; |
||
17 | compatible = "jedec,spi-nor"; |
19 | compatible = "jedec,spi-nor"; |
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18 | reg = <0>; |
20 | reg = <0>; |
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19 | spi-max-frequency = <10000000>; |
21 | spi-max-frequency = <10000000>; |
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20 | |
- | ||
21 | partitions { |
- | ||
22 | compatible = "fixed-partitions"; |
- | ||
23 | #address-cells = <1>; |
- | ||
24 | #size-cells = <1>; |
- | ||
25 | |
22 | |
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26 | partition@0 { |
23 | partition@0 { |
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27 | label = "u-boot"; |
24 | label = "u-boot"; |
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28 | reg = <0x0 0x30000>; |
25 | reg = <0x0 0x30000>; |
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29 | read-only; |
26 | read-only; |
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30 | }; |
27 | }; |
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31 | |
28 | |
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32 | partition@30000 { |
29 | partition@30000 { |
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33 | label = "u-boot-env"; |
30 | label = "u-boot-env"; |
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34 | reg = <0x30000 0x10000>; |
31 | reg = <0x30000 0x10000>; |
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35 | read-only; |
32 | read-only; |
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36 | }; |
33 | }; |
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37 | |
34 | |
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38 | factory: partition@40000 { |
35 | factory: partition@40000 { |
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39 | label = "factory"; |
36 | label = "factory"; |
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40 | reg = <0x40000 0x10000>; |
37 | reg = <0x40000 0x10000>; |
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41 | read-only; |
38 | read-only; |
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42 | }; |
39 | }; |
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43 | |
40 | |
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44 | partition@50000 { |
41 | partition@50000 { |
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45 | compatible = "denx,uimage"; |
- | ||
46 | label = "firmware"; |
42 | label = "firmware"; |
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47 | reg = <0x50000 0x7b0000>; |
43 | reg = <0x50000 0x7b0000>; |
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48 | }; |
44 | }; |
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49 | }; |
45 | }; |
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50 | }; |
46 | }; |
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51 | }; |
- | ||
52 | |
47 | |
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53 | &gpio1 { |
48 | &gpio1 { |
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54 | status = "okay"; |
49 | status = "okay"; |
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55 | }; |
50 | }; |
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56 | |
51 | |
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57 | &pinctrl { |
52 | &pinctrl { |
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58 | state_default: pinctrl0 { |
53 | state_default: pinctrl0 { |
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59 | gpio { |
54 | gpio { |
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60 | ralink,group = "jtag"; |
55 | ralink,group = "jtag", "rgmii", "mdio"; |
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61 | ralink,function = "gpio"; |
56 | ralink,function = "gpio"; |
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62 | }; |
57 | }; |
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63 | uartf_gpio { |
58 | uartf_gpio { |
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64 | ralink,group = "uartf"; |
59 | ralink,group = "uartf"; |
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65 | ralink,function = "gpio uartf"; |
60 | ralink,function = "gpio uartf"; |
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66 | }; |
61 | }; |
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67 | }; |
62 | }; |
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68 | }; |
63 | }; |
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69 | |
64 | |
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70 | ðernet { |
65 | ðernet { |
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71 | mtd-mac-address = <&factory 0x4>; |
66 | mtd-mac-address = <&factory 0x4>; |
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72 | }; |
67 | }; |
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73 | |
68 | |
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74 | &esw { |
69 | &esw { |
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75 | mediatek,portmap = <0x2f>; |
70 | mediatek,portmap = <0x2f>; |
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76 | mediatek,led_polarity = <0x17>; |
71 | mediatek,led_polarity = <0x17>; |
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77 | }; |
72 | }; |
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78 | |
73 | |
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79 | &wmac { |
74 | &wmac { |
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80 | ralink,mtd-eeprom = <&factory 0>; |
75 | ralink,mtd-eeprom = <&factory 0>; |
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81 | ralink,led-polarity = <1>; |
76 | ralink,led-polarity = <1>; |
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82 | }; |
77 | }; |
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83 | |
78 | |
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84 | &ehci { |
79 | &ehci { |
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85 | status = "okay"; |
80 | status = "okay"; |
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86 | }; |
81 | }; |
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87 | |
82 | |
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88 | &ohci { |
83 | &ohci { |
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89 | status = "okay"; |
84 | status = "okay"; |
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90 | }; |
85 | }; |
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91 | |
86 | |
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92 | &i2c { |
87 | &i2c { |
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93 | status = "okay"; |
88 | status = "okay"; |
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94 | }; |
89 | }; |
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95 | |
90 | |
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96 | &uart { |
91 | &uart { |
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97 | status = "okay"; |
92 | status = "okay"; |
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98 | }; |
93 | }; |
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99 | |
94 | |
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100 | |
95 | |