OpenWrt – Diff between revs 2 and 3

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Rev 2 Rev 3
1 /dts-v1/; 1 /dts-v1/;
2   2  
3 #include "mt7621.dtsi" 3 #include "mt7621.dtsi"
4   4  
5 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/input/input.h>
7   7  
8 / { 8 / {
9 compatible = "firefly,firewrt", "mediatek,mt7621-soc"; 9 compatible = "firefly,firewrt", "mediatek,mt7621-soc";
10 model = "Firefly FireWRT"; 10 model = "Firefly FireWRT";
11   -  
12 aliases { -  
13 led-boot = &led_power; -  
14 led-failsafe = &led_power; -  
15 led-running = &led_power; -  
16 led-upgrade = &led_power; -  
17 }; -  
18   11  
19 memory@0 { 12 memory@0 {
20 device_type = "memory"; 13 device_type = "memory";
21 reg = <0x0 0x1c000000>, <0x20000000 0x4000000>; 14 reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
22 }; 15 };
23   16  
24 chosen { 17 chosen {
25 bootargs = "console=ttyS0,57600"; 18 bootargs = "console=ttyS0,57600";
26 }; 19 };
27   20  
28 leds { 21 gpio-leds {
29 compatible = "gpio-leds"; 22 compatible = "gpio-leds";
30   23  
31 led_power: power { 24 power {
32 label = "firewrt:green:power"; 25 label = "firewrt:green:power";
33 gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; 26 gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
34 }; 27 };
35 }; 28 };
36   29  
37 keys { 30 gpio-keys-polled {
-   31 compatible = "gpio-keys-polled";
-   32 #address-cells = <1>;
38 compatible = "gpio-keys-polled"; 33 #size-cells = <0>;
39 poll-interval = <20>; 34 poll-interval = <20>;
40   35  
41 wps { 36 wps {
42 label = "wps"; 37 label = "wps";
43 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 38 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_WPS_BUTTON>; 39 linux,code = <KEY_WPS_BUTTON>;
45 }; 40 };
46   41  
47 power { 42 power {
48 label = "power"; 43 label = "power";
49 gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; 44 gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_POWER>; 45 linux,code = <KEY_POWER>;
51 }; 46 };
52 }; 47 };
53 }; 48 };
54   49  
55 &sdhci { 50 &sdhci {
56 status = "okay"; 51 status = "okay";
57 }; 52 };
58   53  
59 &spi0 { 54 &spi0 {
60 status = "okay"; 55 status = "okay";
61   56  
62 m25p80@0 { 57 m25p80@0 {
-   58 #address-cells = <1>;
-   59 #size-cells = <1>;
63 compatible = "jedec,spi-nor"; 60 compatible = "jedec,spi-nor";
64 reg = <0>; 61 reg = <0>;
65 spi-max-frequency = <10000000>; 62 spi-max-frequency = <10000000>;
66   -  
67 partitions { -  
68 compatible = "fixed-partitions"; -  
69 #address-cells = <1>; -  
70 #size-cells = <1>; 63 m25p,chunked-io = <32>;
71   64  
72 partition@0 { 65 partition@0 {
73 label = "u-boot"; 66 label = "u-boot";
74 reg = <0x0 0x30000>; 67 reg = <0x0 0x30000>;
75 read-only; 68 read-only;
76 }; 69 };
77   70  
78 partition@30000 { 71 partition@30000 {
79 label = "u-boot-env"; 72 label = "u-boot-env";
80 reg = <0x30000 0x10000>; 73 reg = <0x30000 0x10000>;
81 read-only; 74 read-only;
82 }; 75 };
83   76  
84 factory: partition@40000 { 77 factory: partition@40000 {
85 label = "factory"; 78 label = "factory";
86 reg = <0x40000 0x10000>; 79 reg = <0x40000 0x10000>;
87 read-only; 80 read-only;
88 }; 81 };
89   82  
90 partition@50000 { 83 partition@50000 {
91 compatible = "denx,uimage"; -  
92 label = "firmware"; 84 label = "firmware";
93 reg = <0x50000 0xfb0000>; 85 reg = <0x50000 0xfb0000>;
94 }; 86 };
95 }; 87 };
96 }; 88 };
97 }; -  
98   89  
99 &pcie { 90 &pcie {
100 status = "okay"; 91 status = "okay";
101 }; -  
102   92  
103 &pcie0 { 93 pcie0 {
104 mt76@0,0 { 94 mt76@0,0 {
-   95 reg = <0x0000 0 0 0 0>;
105 reg = <0x0000 0 0 0 0>; 96 device_type = "pci";
106 mediatek,mtd-eeprom = <&factory 0x8000>; 97 mediatek,mtd-eeprom = <&factory 0x8000>;
107 ieee80211-freq-limit = <5000000 6000000>; 98 ieee80211-freq-limit = <5000000 6000000>;
108 }; 99 };
109 }; 100 };
110   101  
111 &pcie1 { 102 pcie1 {
112 mt76@0,0 { 103 mt76@1,0 {
-   104 reg = <0x0000 0 0 0 0>;
113 reg = <0x0000 0 0 0 0>; 105 device_type = "pci";
114 mediatek,mtd-eeprom = <&factory 0x0000>; 106 mediatek,mtd-eeprom = <&factory 0x0000>;
115 ieee80211-freq-limit = <2400000 2500000>; 107 ieee80211-freq-limit = <2400000 2500000>;
116 }; 108 };
-   109 };
117 }; 110 };
118   111  
119 &ethernet { 112 &ethernet {
120 mtd-mac-address = <&factory 0xe000>; 113 mtd-mac-address = <&factory 0xe000>;
121 }; 114 };
122   115  
123 &pinctrl { 116 &pinctrl {
124 state_default: pinctrl0 { 117 state_default: pinctrl0 {
125 gpio { 118 gpio {
126 ralink,group = "wdt", "rgmii2"; 119 ralink,group = "wdt", "rgmii2";
127 ralink,function = "gpio"; 120 ralink,function = "gpio";
128 }; 121 };
129 }; 122 };
130 }; 123 };
131   124