/branches/gl-inet/target/linux/ipq806x/patches-4.14/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch |
@@ -0,0 +1,69 @@ |
From edff8f777c6321ca89bb950a382f409c4a126e28 Mon Sep 17 00:00:00 2001 |
From: Gokul Sriram Palanisamy <gpalan@codeaurora.org> |
Date: Thu, 15 Dec 2016 17:38:18 +0530 |
Subject: pcie: Set PCIE MRRS and MPS to 256B |
|
Set Max Read Request Size and Max Payload Size to 256 bytes, |
per chip team recommendation. |
|
Change-Id: I097004be2ced1b3096ffc10c318aae0b2bb155e8 |
Signed-off-by: Gokul Sriram Palanisamy <gpalan@codeaurora.org> |
--- |
drivers/pci/host/pcie-qcom.c | 37 +++++++++++++++++++++++++++++++++++++ |
1 file changed, 37 insertions(+) |
|
(limited to 'drivers/pci/host/pcie-qcom.c') |
|
--- a/drivers/pci/dwc/pcie-qcom.c |
+++ b/drivers/pci/dwc/pcie-qcom.c |
@@ -131,6 +131,14 @@ |
|
#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 |
|
+#define __set(v, a, b) (((v) << (b)) & GENMASK(a, b)) |
+#define __mask(a, b) (((1 << ((a) + 1)) - 1) & ~((1 << (b)) - 1)) |
+#define PCIE20_DEV_CAS 0x78 |
+#define PCIE20_MRRS_MASK __mask(14, 12) |
+#define PCIE20_MRRS(x) __set(x, 14, 12) |
+#define PCIE20_MPS_MASK __mask(7, 5) |
+#define PCIE20_MPS(x) __set(x, 7, 5) |
+ |
struct qcom_pcie_resources_2_1_0 { |
struct clk *iface_clk; |
struct clk *core_clk; |
@@ -1472,6 +1480,35 @@ static int qcom_pcie_probe(struct platfo |
return 0; |
} |
|
+static void qcom_pcie_fixup_final(struct pci_dev *dev) |
+{ |
+ int cap, err; |
+ u16 ctl, reg_val; |
+ |
+ cap = pci_pcie_cap(dev); |
+ if (!cap) |
+ return; |
+ |
+ err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); |
+ |
+ if (err) |
+ return; |
+ |
+ reg_val = ctl; |
+ |
+ if (((reg_val & PCIE20_MRRS_MASK) >> 12) > 1) |
+ reg_val = (reg_val & ~(PCIE20_MRRS_MASK)) | PCIE20_MRRS(0x1); |
+ |
+ if (((ctl & PCIE20_MPS_MASK) >> 5) > 1) |
+ reg_val = (reg_val & ~(PCIE20_MPS_MASK)) | PCIE20_MPS(0x1); |
+ |
+ err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, reg_val); |
+ |
+ if (err) |
+ pr_err("pcie config write failed %d\n", err); |
+} |
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, qcom_pcie_fixup_final); |
+ |
static const struct of_device_id qcom_pcie_match[] = { |
{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 }, |
{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 }, |