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/branches/gl-inet/target/linux/generic/files/include/linux/ar8216_platform.h
@@ -0,0 +1,133 @@
/*
* AR8216 switch driver platform data
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
 
#ifndef AR8216_PLATFORM_H
#define AR8216_PLATFORM_H
 
enum ar8327_pad_mode {
AR8327_PAD_NC = 0,
AR8327_PAD_MAC2MAC_MII,
AR8327_PAD_MAC2MAC_GMII,
AR8327_PAD_MAC_SGMII,
AR8327_PAD_MAC2PHY_MII,
AR8327_PAD_MAC2PHY_GMII,
AR8327_PAD_MAC_RGMII,
AR8327_PAD_PHY_GMII,
AR8327_PAD_PHY_RGMII,
AR8327_PAD_PHY_MII,
};
 
enum ar8327_clk_delay_sel {
AR8327_CLK_DELAY_SEL0 = 0,
AR8327_CLK_DELAY_SEL1,
AR8327_CLK_DELAY_SEL2,
AR8327_CLK_DELAY_SEL3,
};
 
struct ar8327_pad_cfg {
enum ar8327_pad_mode mode;
bool rxclk_sel;
bool txclk_sel;
bool pipe_rxclk_sel;
bool txclk_delay_en;
bool rxclk_delay_en;
bool sgmii_delay_en;
enum ar8327_clk_delay_sel txclk_delay_sel;
enum ar8327_clk_delay_sel rxclk_delay_sel;
bool mac06_exchange_dis;
};
 
enum ar8327_port_speed {
AR8327_PORT_SPEED_10 = 0,
AR8327_PORT_SPEED_100,
AR8327_PORT_SPEED_1000,
};
 
struct ar8327_port_cfg {
int force_link:1;
enum ar8327_port_speed speed;
int txpause:1;
int rxpause:1;
int duplex:1;
};
 
struct ar8327_sgmii_cfg {
u32 sgmii_ctrl;
bool serdes_aen;
};
 
struct ar8327_led_cfg {
u32 led_ctrl0;
u32 led_ctrl1;
u32 led_ctrl2;
u32 led_ctrl3;
bool open_drain;
};
 
enum ar8327_led_num {
AR8327_LED_PHY0_0 = 0,
AR8327_LED_PHY0_1,
AR8327_LED_PHY0_2,
AR8327_LED_PHY1_0,
AR8327_LED_PHY1_1,
AR8327_LED_PHY1_2,
AR8327_LED_PHY2_0,
AR8327_LED_PHY2_1,
AR8327_LED_PHY2_2,
AR8327_LED_PHY3_0,
AR8327_LED_PHY3_1,
AR8327_LED_PHY3_2,
AR8327_LED_PHY4_0,
AR8327_LED_PHY4_1,
AR8327_LED_PHY4_2,
};
 
enum ar8327_led_mode {
AR8327_LED_MODE_HW = 0,
AR8327_LED_MODE_SW,
};
 
struct ar8327_led_info {
const char *name;
const char *default_trigger;
bool active_low;
enum ar8327_led_num led_num;
enum ar8327_led_mode mode;
};
 
#define AR8327_LED_INFO(_led, _mode, _name) { \
.name = (_name), \
.led_num = AR8327_LED_ ## _led, \
.mode = AR8327_LED_MODE_ ## _mode \
}
 
struct ar8327_platform_data {
struct ar8327_pad_cfg *pad0_cfg;
struct ar8327_pad_cfg *pad5_cfg;
struct ar8327_pad_cfg *pad6_cfg;
struct ar8327_sgmii_cfg *sgmii_cfg;
struct ar8327_port_cfg port0_cfg;
struct ar8327_port_cfg port6_cfg;
struct ar8327_led_cfg *led_cfg;
 
int (*get_port_link)(unsigned port);
 
unsigned num_leds;
const struct ar8327_led_info *leds;
};
 
#endif /* AR8216_PLATFORM_H */
 
/branches/gl-inet/target/linux/generic/files/include/linux/ath5k_platform.h
@@ -0,0 +1,30 @@
/*
* Copyright (c) 2008 Atheros Communications Inc.
* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
* Copyright (c) 2010 Daniel Golle <daniel.golle@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
 
#ifndef _LINUX_ATH5K_PLATFORM_H
#define _LINUX_ATH5K_PLATFORM_H
 
#define ATH5K_PLAT_EEP_MAX_WORDS 2048
 
struct ath5k_platform_data {
u16 *eeprom_data;
u8 *macaddr;
};
 
#endif /* _LINUX_ATH5K_PLATFORM_H */
/branches/gl-inet/target/linux/generic/files/include/linux/ath9k_platform.h
@@ -0,0 +1,60 @@
/*
* Copyright (c) 2008 Atheros Communications Inc.
* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
 
#ifndef _LINUX_ATH9K_PLATFORM_H
#define _LINUX_ATH9K_PLATFORM_H
 
#define ATH9K_PLAT_EEP_MAX_WORDS 2048
 
struct ath9k_platform_data {
const char *eeprom_name;
 
u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
u8 *macaddr;
 
int led_pin;
u32 gpio_mask;
u32 gpio_val;
 
u32 bt_active_pin;
u32 bt_priority_pin;
u32 wlan_active_pin;
 
bool endian_check;
bool is_clk_25mhz;
bool tx_gain_buffalo;
bool disable_2ghz;
bool disable_5ghz;
bool led_active_high;
 
int (*get_mac_revision)(void);
int (*external_reset)(void);
 
bool use_eeprom;
 
int num_leds;
const struct gpio_led *leds;
 
unsigned num_btns;
const struct gpio_keys_button *btns;
unsigned btn_poll_interval;
 
bool ubnt_hsr;
};
 
#endif /* _LINUX_ATH9K_PLATFORM_H */
/branches/gl-inet/target/linux/generic/files/include/linux/myloader.h
@@ -0,0 +1,121 @@
/*
* Compex's MyLoader specific definitions
*
* Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
 
#ifndef _MYLOADER_H_
#define _MYLOADER_H_
 
/* Myloader specific magic numbers */
#define MYLO_MAGIC_SYS_PARAMS 0x20021107
#define MYLO_MAGIC_PARTITIONS 0x20021103
#define MYLO_MAGIC_BOARD_PARAMS 0x20021103
 
/* Vendor ID's (seems to be same as the PCI vendor ID's) */
#define VENID_COMPEX 0x11F6
 
/* Devices based on the ADM5120 */
#define DEVID_COMPEX_NP27G 0x0078
#define DEVID_COMPEX_NP28G 0x044C
#define DEVID_COMPEX_NP28GHS 0x044E
#define DEVID_COMPEX_WP54Gv1C 0x0514
#define DEVID_COMPEX_WP54G 0x0515
#define DEVID_COMPEX_WP54AG 0x0546
#define DEVID_COMPEX_WPP54AG 0x0550
#define DEVID_COMPEX_WPP54G 0x0555
 
/* Devices based on the Atheros AR2317 */
#define DEVID_COMPEX_NP25G 0x05E6
#define DEVID_COMPEX_WPE53G 0x05DC
 
/* Devices based on the Atheros AR71xx */
#define DEVID_COMPEX_WP543 0x0640
#define DEVID_COMPEX_WPE72 0x0672
 
/* Devices based on the IXP422 */
#define DEVID_COMPEX_WP18 0x047E
#define DEVID_COMPEX_NP18A 0x0489
 
/* Other devices */
#define DEVID_COMPEX_NP26G8M 0x03E8
#define DEVID_COMPEX_NP26G16M 0x03E9
 
struct mylo_partition {
uint16_t flags; /* partition flags */
uint16_t type; /* type of the partition */
uint32_t addr; /* relative address of the partition from the
flash start */
uint32_t size; /* size of the partition in bytes */
uint32_t param; /* if this is the active partition, the
MyLoader load code to this address */
};
 
#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition,
* MyLoader loads firmware from here */
#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */
#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */
#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM
* before decompression */
#define PARTITION_FLAG_LZMA 0x0100 /* partition data compressed by LZMA */
#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */
 
#define PARTITION_TYPE_FREE 0
#define PARTITION_TYPE_USED 1
 
#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the
partition table */
 
struct mylo_partition_table {
uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */
uint32_t res0; /* unknown/unused */
uint32_t res1; /* unknown/unused */
uint32_t res2; /* unknown/unused */
struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
};
 
struct mylo_partition_header {
uint32_t len; /* length of the partition data */
uint32_t crc; /* CRC value of the partition data */
};
 
struct mylo_system_params {
uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */
uint32_t res0;
uint32_t res1;
uint32_t mylo_ver;
uint16_t vid; /* Vendor ID */
uint16_t did; /* Device ID */
uint16_t svid; /* Sub Vendor ID */
uint16_t sdid; /* Sub Device ID */
uint32_t rev; /* device revision */
uint32_t fwhi;
uint32_t fwlo;
uint32_t tftp_addr;
uint32_t prog_start;
uint32_t flash_size; /* size of boot FLASH in bytes */
uint32_t dram_size; /* size of onboard RAM in bytes */
};
 
struct mylo_eth_addr {
uint8_t mac[6];
uint8_t csum[2];
};
 
#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address
in the board parameters */
 
struct mylo_board_params {
uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */
uint32_t res0;
uint32_t res1;
uint32_t res2;
struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
};
 
#endif /* _MYLOADER_H_*/
/branches/gl-inet/target/linux/generic/files/include/linux/platform_data/adm6996-gpio.h
@@ -0,0 +1,29 @@
/*
* ADM6996 GPIO platform data
*
* Copyright (C) 2013 Hauke Mehrtens <hauke@hauke-m.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License v2 as published by the
* Free Software Foundation
*/
 
#ifndef __PLATFORM_ADM6996_GPIO_H
#define __PLATFORM_ADM6996_GPIO_H
 
#include <linux/kernel.h>
 
enum adm6996_model {
ADM6996FC = 1,
ADM6996M = 2,
ADM6996L = 3,
};
 
struct adm6996_gpio_platform_data {
u8 eecs;
u8 eesk;
u8 eedi;
enum adm6996_model model;
};
 
#endif
/branches/gl-inet/target/linux/generic/files/include/linux/platform_data/b53.h
@@ -0,0 +1,36 @@
/*
* B53 platform data
*
* Copyright (C) 2013 Jonas Gorski <jogo@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
 
#ifndef __B53_H
#define __B53_H
 
#include <linux/kernel.h>
 
struct b53_platform_data {
u32 chip_id;
u16 enabled_ports;
 
/* allow to specify an ethX alias */
const char *alias;
 
/* only used by MMAP'd driver */
unsigned big_endian:1;
void __iomem *regs;
};
 
#endif
/branches/gl-inet/target/linux/generic/files/include/linux/routerboot.h
@@ -0,0 +1,106 @@
/*
* Mikrotik's RouterBOOT definitions
*
* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
 
#ifndef _ROUTERBOOT_H
#define _ROUTERBOOT_H
 
#define RB_MAC_SIZE 6
 
/*
* Magic numbers
*/
#define RB_MAGIC_HARD 0x64726148 /* "Hard" */
#define RB_MAGIC_SOFT 0x74666F53 /* "Soft" */
#define RB_MAGIC_DAWN 0x6E776144 /* "Dawn" */
 
#define RB_ID_TERMINATOR 0
 
/*
* ID values for Hardware settings
*/
#define RB_ID_HARD_01 1
#define RB_ID_HARD_02 2
#define RB_ID_FLASH_INFO 3
#define RB_ID_MAC_ADDRESS_PACK 4
#define RB_ID_BOARD_NAME 5
#define RB_ID_BIOS_VERSION 6
#define RB_ID_HARD_07 7
#define RB_ID_SDRAM_TIMINGS 8
#define RB_ID_DEVICE_TIMINGS 9
#define RB_ID_SOFTWARE_ID 10
#define RB_ID_SERIAL_NUMBER 11
#define RB_ID_HARD_12 12
#define RB_ID_MEMORY_SIZE 13
#define RB_ID_MAC_ADDRESS_COUNT 14
#define RB_ID_HW_OPTIONS 21
#define RB_ID_WLAN_DATA 22
 
/*
* ID values for Software settings
*/
#define RB_ID_UART_SPEED 1
#define RB_ID_BOOT_DELAY 2
#define RB_ID_BOOT_DEVICE 3
#define RB_ID_BOOT_KEY 4
#define RB_ID_CPU_MODE 5
#define RB_ID_FW_VERSION 6
#define RB_ID_SOFT_07 7
#define RB_ID_SOFT_08 8
#define RB_ID_BOOT_PROTOCOL 9
#define RB_ID_SOFT_10 10
#define RB_ID_SOFT_11 11
 
/*
* UART_SPEED values
*/
#define RB_UART_SPEED_115200 0
#define RB_UART_SPEED_57600 1
#define RB_UART_SPEED_38400 2
#define RB_UART_SPEED_19200 3
#define RB_UART_SPEED_9600 4
#define RB_UART_SPEED_4800 5
#define RB_UART_SPEED_2400 6
#define RB_UART_SPEED_1200 7
 
/*
* BOOT_DELAY values
*/
#define RB_BOOT_DELAY_0SEC 0
#define RB_BOOT_DELAY_1SEC 1
#define RB_BOOT_DELAY_2SEC 2
 
/*
* BOOT_DEVICE values
*/
#define RB_BOOT_DEVICE_ETHER 0
#define RB_BOOT_DEVICE_NANDETH 1
#define RB_BOOT_DEVICE_ETHONCE 2
#define RB_BOOT_DEVICE_NANDONLY 3
 
/*
* BOOT_KEY values
*/
#define RB_BOOT_KEY_ANY 0
#define RB_BOOT_KEY_DEL 1
 
/*
* CPU_MODE values
*/
#define RB_CPU_MODE_POWERSAVE 0
#define RB_CPU_MODE_REGULAR 1
 
/*
* BOOT_PROTOCOL values
*/
#define RB_BOOT_PROTOCOL_BOOTP 0
#define RB_BOOT_PROTOCOL_DHCP 1
 
#endif /* _ROUTERBOOT_H */
/branches/gl-inet/target/linux/generic/files/include/linux/rt2x00_platform.h
@@ -0,0 +1,23 @@
/*
* Platform data definition for the rt2x00 driver
*
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
 
#ifndef _RT2X00_PLATFORM_H
#define _RT2X00_PLATFORM_H
 
struct rt2x00_platform_data {
char *eeprom_file_name;
const u8 *mac_address;
 
int disable_2ghz;
int disable_5ghz;
};
 
#endif /* _RT2X00_PLATFORM_H */
/branches/gl-inet/target/linux/generic/files/include/linux/rtl8366.h
@@ -0,0 +1,40 @@
/*
* Platform data definition for the Realtek RTL8366RB/S ethernet switch driver
*
* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
 
#ifndef _RTL8366_H
#define _RTL8366_H
 
#define RTL8366_DRIVER_NAME "rtl8366"
#define RTL8366S_DRIVER_NAME "rtl8366s"
#define RTL8366RB_DRIVER_NAME "rtl8366rb"
 
enum rtl8366_type {
RTL8366_TYPE_UNKNOWN,
RTL8366_TYPE_S,
RTL8366_TYPE_RB,
};
 
struct rtl8366_initval {
unsigned reg;
u16 val;
};
 
struct rtl8366_platform_data {
unsigned gpio_sda;
unsigned gpio_sck;
void (*hw_reset)(bool active);
 
unsigned num_initvals;
struct rtl8366_initval *initvals;
};
 
enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata);
 
#endif /* _RTL8366_H */
/branches/gl-inet/target/linux/generic/files/include/linux/rtl8367.h
@@ -0,0 +1,60 @@
/*
* Platform data definition for the Realtek RTL8367 ethernet switch driver
*
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
 
#ifndef _RTL8367_H
#define _RTL8367_H
 
#define RTL8367_DRIVER_NAME "rtl8367"
#define RTL8367B_DRIVER_NAME "rtl8367b"
 
enum rtl8367_port_speed {
RTL8367_PORT_SPEED_10 = 0,
RTL8367_PORT_SPEED_100,
RTL8367_PORT_SPEED_1000,
};
 
struct rtl8367_port_ability {
int force_mode;
int nway;
int txpause;
int rxpause;
int link;
int duplex;
enum rtl8367_port_speed speed;
};
 
enum rtl8367_extif_mode {
RTL8367_EXTIF_MODE_DISABLED = 0,
RTL8367_EXTIF_MODE_RGMII,
RTL8367_EXTIF_MODE_MII_MAC,
RTL8367_EXTIF_MODE_MII_PHY,
RTL8367_EXTIF_MODE_TMII_MAC,
RTL8367_EXTIF_MODE_TMII_PHY,
RTL8367_EXTIF_MODE_GMII,
RTL8367_EXTIF_MODE_RGMII_33V,
};
 
struct rtl8367_extif_config {
unsigned int txdelay;
unsigned int rxdelay;
enum rtl8367_extif_mode mode;
struct rtl8367_port_ability ability;
};
 
struct rtl8367_platform_data {
unsigned gpio_sda;
unsigned gpio_sck;
void (*hw_reset)(bool active);
 
struct rtl8367_extif_config *extif0_cfg;
struct rtl8367_extif_config *extif1_cfg;
};
 
#endif /* _RTL8367_H */
/branches/gl-inet/target/linux/generic/files/include/linux/switch.h
@@ -0,0 +1,179 @@
/*
* switch.h: Switch configuration API
*
* Copyright (C) 2008 Felix Fietkau <nbd@nbd.name>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _LINUX_SWITCH_H
#define _LINUX_SWITCH_H
 
#include <net/genetlink.h>
#include <uapi/linux/switch.h>
 
struct switch_dev;
struct switch_op;
struct switch_val;
struct switch_attr;
struct switch_attrlist;
struct switch_led_trigger;
 
int register_switch(struct switch_dev *dev, struct net_device *netdev);
void unregister_switch(struct switch_dev *dev);
 
/**
* struct switch_attrlist - attribute list
*
* @n_attr: number of attributes
* @attr: pointer to the attributes array
*/
struct switch_attrlist {
int n_attr;
const struct switch_attr *attr;
};
 
enum switch_port_speed {
SWITCH_PORT_SPEED_UNKNOWN = 0,
SWITCH_PORT_SPEED_10 = 10,
SWITCH_PORT_SPEED_100 = 100,
SWITCH_PORT_SPEED_1000 = 1000,
};
 
struct switch_port_link {
bool link;
bool duplex;
bool aneg;
bool tx_flow;
bool rx_flow;
enum switch_port_speed speed;
/* in ethtool adv_t format */
u32 eee;
};
 
struct switch_port_stats {
unsigned long long tx_bytes;
unsigned long long rx_bytes;
};
 
/**
* struct switch_dev_ops - switch driver operations
*
* @attr_global: global switch attribute list
* @attr_port: port attribute list
* @attr_vlan: vlan attribute list
*
* Callbacks:
*
* @get_vlan_ports: read the port list of a VLAN
* @set_vlan_ports: set the port list of a VLAN
*
* @get_port_pvid: get the primary VLAN ID of a port
* @set_port_pvid: set the primary VLAN ID of a port
*
* @apply_config: apply all changed settings to the switch
* @reset_switch: resetting the switch
*/
struct switch_dev_ops {
struct switch_attrlist attr_global, attr_port, attr_vlan;
 
int (*get_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
int (*set_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
 
int (*get_port_pvid)(struct switch_dev *dev, int port, int *val);
int (*set_port_pvid)(struct switch_dev *dev, int port, int val);
 
int (*apply_config)(struct switch_dev *dev);
int (*reset_switch)(struct switch_dev *dev);
 
int (*get_port_link)(struct switch_dev *dev, int port,
struct switch_port_link *link);
int (*set_port_link)(struct switch_dev *dev, int port,
struct switch_port_link *link);
int (*get_port_stats)(struct switch_dev *dev, int port,
struct switch_port_stats *stats);
 
int (*phy_read16)(struct switch_dev *dev, int addr, u8 reg, u16 *value);
int (*phy_write16)(struct switch_dev *dev, int addr, u8 reg, u16 value);
};
 
struct switch_dev {
struct device_node *of_node;
const struct switch_dev_ops *ops;
/* will be automatically filled */
char devname[IFNAMSIZ];
 
const char *name;
/* NB: either alias or netdev must be set */
const char *alias;
struct net_device *netdev;
 
unsigned int ports;
unsigned int vlans;
unsigned int cpu_port;
 
/* the following fields are internal for swconfig */
unsigned int id;
struct list_head dev_list;
unsigned long def_global, def_port, def_vlan;
 
struct mutex sw_mutex;
struct switch_port *portbuf;
struct switch_portmap *portmap;
struct switch_port_link linkbuf;
 
char buf[128];
 
#ifdef CONFIG_SWCONFIG_LEDS
struct switch_led_trigger *led_trigger;
#endif
};
 
struct switch_port {
u32 id;
u32 flags;
};
 
struct switch_portmap {
u32 virt;
const char *s;
};
 
struct switch_val {
const struct switch_attr *attr;
unsigned int port_vlan;
unsigned int len;
union {
const char *s;
u32 i;
struct switch_port *ports;
struct switch_port_link *link;
} value;
};
 
struct switch_attr {
int disabled;
int type;
const char *name;
const char *description;
 
int (*set)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
int (*get)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
 
/* for driver internal use */
int id;
int ofs;
int max;
};
 
int switch_generic_set_link(struct switch_dev *dev, int port,
struct switch_port_link *link);
 
#endif /* _LINUX_SWITCH_H */
/branches/gl-inet/target/linux/generic/files/include/uapi/linux/switch.h
@@ -0,0 +1,119 @@
/*
* switch.h: Switch configuration API
*
* Copyright (C) 2008 Felix Fietkau <nbd@nbd.name>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
 
#ifndef _UAPI_LINUX_SWITCH_H
#define _UAPI_LINUX_SWITCH_H
 
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/netlink.h>
#include <linux/genetlink.h>
#ifndef __KERNEL__
#include <netlink/netlink.h>
#include <netlink/genl/genl.h>
#include <netlink/genl/ctrl.h>
#endif
 
/* main attributes */
enum {
SWITCH_ATTR_UNSPEC,
/* global */
SWITCH_ATTR_TYPE,
/* device */
SWITCH_ATTR_ID,
SWITCH_ATTR_DEV_NAME,
SWITCH_ATTR_ALIAS,
SWITCH_ATTR_NAME,
SWITCH_ATTR_VLANS,
SWITCH_ATTR_PORTS,
SWITCH_ATTR_PORTMAP,
SWITCH_ATTR_CPU_PORT,
/* attributes */
SWITCH_ATTR_OP_ID,
SWITCH_ATTR_OP_TYPE,
SWITCH_ATTR_OP_NAME,
SWITCH_ATTR_OP_PORT,
SWITCH_ATTR_OP_VLAN,
SWITCH_ATTR_OP_VALUE_INT,
SWITCH_ATTR_OP_VALUE_STR,
SWITCH_ATTR_OP_VALUE_PORTS,
SWITCH_ATTR_OP_VALUE_LINK,
SWITCH_ATTR_OP_DESCRIPTION,
/* port lists */
SWITCH_ATTR_PORT,
SWITCH_ATTR_MAX
};
 
enum {
/* port map */
SWITCH_PORTMAP_PORTS,
SWITCH_PORTMAP_SEGMENT,
SWITCH_PORTMAP_VIRT,
SWITCH_PORTMAP_MAX
};
 
/* commands */
enum {
SWITCH_CMD_UNSPEC,
SWITCH_CMD_GET_SWITCH,
SWITCH_CMD_NEW_ATTR,
SWITCH_CMD_LIST_GLOBAL,
SWITCH_CMD_GET_GLOBAL,
SWITCH_CMD_SET_GLOBAL,
SWITCH_CMD_LIST_PORT,
SWITCH_CMD_GET_PORT,
SWITCH_CMD_SET_PORT,
SWITCH_CMD_LIST_VLAN,
SWITCH_CMD_GET_VLAN,
SWITCH_CMD_SET_VLAN
};
 
/* data types */
enum switch_val_type {
SWITCH_TYPE_UNSPEC,
SWITCH_TYPE_INT,
SWITCH_TYPE_STRING,
SWITCH_TYPE_PORTS,
SWITCH_TYPE_LINK,
SWITCH_TYPE_NOVAL,
};
 
/* port nested attributes */
enum {
SWITCH_PORT_UNSPEC,
SWITCH_PORT_ID,
SWITCH_PORT_FLAG_TAGGED,
SWITCH_PORT_ATTR_MAX
};
 
/* link nested attributes */
enum {
SWITCH_LINK_UNSPEC,
SWITCH_LINK_FLAG_LINK,
SWITCH_LINK_FLAG_DUPLEX,
SWITCH_LINK_FLAG_ANEG,
SWITCH_LINK_FLAG_TX_FLOW,
SWITCH_LINK_FLAG_RX_FLOW,
SWITCH_LINK_SPEED,
SWITCH_LINK_FLAG_EEE_100BASET,
SWITCH_LINK_FLAG_EEE_1000BASET,
SWITCH_LINK_ATTR_MAX,
};
 
#define SWITCH_ATTR_DEFAULTS_OFFSET 0x1000
 
 
#endif /* _UAPI_LINUX_SWITCH_H */