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/branches/gl-inet/target/linux/at91/files/arch/arm/boot/dts/at91-q5xr5.dts
@@ -0,0 +1,193 @@
/*
* q5xr5.dts - Device Tree file for Exegin Q5xR5 board
*
* Copyright (C) 2014 Owen Kirby <osk@exegin.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
#include "at91sam9g20.dtsi"
 
/ {
model = "Exegin Q5x (rev5)";
compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9";
 
chosen {
bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2";
};
 
memory {
reg = <0x20000000 0x0>;
};
 
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
 
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
 
slow_xtal {
clock-frequency = <32768>;
};
 
main_xtal {
clock-frequency = <18432000>;
};
};
 
ahb {
apb {
pinctrl@fffff400 {
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins = <2 1 0x2 0x0>; /* PC1 periph B */
};
pinctrl_spi0_npcs0: spi0_npcs0 {
atmel,pins = <0 3 0x1 0x0>; /* PA3 periph A */
};
pinctrl_spi0_npcs1: spi0_npcs1 {
atmel,pins = <2 11 0x2 0x0>; /* PC11 periph B */
};
pinctrl_spi1_npcs0: spi1_npcs0 {
atmel,pins = <1 3 0x1 0x0>; /* PB3 periph A */
};
pinctrl_spi1_npcs1: spi1_npcs1 {
atmel,pins = <2 5 0x2 0x0>; /* PC5 periph B */
};
};
 
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
<0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
};
};
 
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
<1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
};
};
};
 
dbgu: serial@fffff200 {
status = "okay";
};
 
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;
status = "okay";
};
 
macb0: ethernet@fffc4000 {
phy-mode = "mii";
status = "okay";
};
 
usb1: gadget@fffa4000 {
status = "okay";
};
 
watchdog@fffffd40 {
status = "okay";
};
spi0: spi@fffc8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffc8000 0x200>;
interrupts = <12 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "okay";
cs-gpios = <&pioA 3 0>, <&pioC 11 1>, <0>, <0>;
 
m25p80@0 {
compatible = "sst,sst25vf040b";
spi-max-frequency = <20000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
at91boot@0 {
label = "at91boot";
reg = <0x0 0x4000>;
};
uenv@4000 {
label = "uboot-env";
reg = <0x4000 0x4000>;
};
uboot@8000 {
label = "uboot";
reg = <0x8000 0x3E000>;
};
};
spidev@1 {
compatible = "spidev";
spi-max-frequency = <2000000>;
reg = <1>;
};
};
spi1: spi@fffcc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffcc000 0x200>;
interrupts = <13 4 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
cs-gpios = <&pioB 3 0>, <&pioC 5 1>, <0>, <0>;
status = "okay";
 
spidev@0 {
compatible = "spidev";
spi-max-frequency = <2000000>;
reg = <0>;
};
spidev@1 {
compatible = "spidev";
spi-max-frequency = <2000000>;
reg = <1>;
};
};
};
usb0: ohci@500000 {
num-ports = <2>;
status = "okay";
};
};
 
flash@10000000 {
compatible = "cfi-flash";
bank-width = <2>;
reg = <0x10000000 0x00800000>;
#address-cells = <1>;
#size-cells = <1>;
 
kernel@0 {
label = "kernel";
reg = <0x0 0x200000>;
};
rootfs@200000 {
label = "rootfs";
reg = <0x200000 0x600000>;
};
};
};
/branches/gl-inet/target/linux/at91/files/arch/arm/boot/dts/lmu5000.dts
@@ -0,0 +1,125 @@
/*
* lmu5000.dst - Device Tree file for CalAmp LMU5000 board
*
* Copyright (C) 2013 Adam Porter <porter.adam@gmail.com>
*
* Licensed under GPLv2.
*/
/dts-v1/;
#include "at91sam9g20.dtsi"
 
/ {
model = "CalAmp LMU5000";
compatible = "calamp,lmu5000", "atmel,at91sam9g20", "atmel,at91sam9";
 
chosen {
bootargs = "mem=64M console=ttyS0,115200 rootfstype=jffs2";
};
 
memory {
reg = <0x20000000 0x4000000>;
};
 
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
 
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <18432000>;
};
};
 
ahb {
apb {
pinctrl@fffff400 {
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
<2 1 0x2 0x0>; /* PC1 periph B */
};
 
};
};
 
dbgu: serial@fffff200 {
status = "okay";
};
 
usart0: serial@fffb0000 {
pinctrl-0 =
<&pinctrl_usart0
&pinctrl_usart0_rts
&pinctrl_usart0_cts
&pinctrl_usart0_dtr_dsr
&pinctrl_usart0_dcd
&pinctrl_usart0_ri>;
status = "okay";
};
 
usart2: serial@fffb8000 {
status = "okay";
};
 
uart0: serial@fffd4000 {
status = "okay";
};
 
uart1: serial@fffd8000 {
status = "okay";
};
 
macb0: ethernet@fffc4000 {
phy-mode = "mii";
status = "okay";
};
 
usb1: gadget@fffa4000 {
atmel,vbus-gpio = <&pioC 5 0>;
status = "okay";
};
 
ssc0: ssc@fffbc000 {
status = "okay";
pinctrl-0 = <&pinctrl_ssc0_tx>;
};
 
watchdog@fffffd40 {
status = "okay";
};
};
 
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "soft";
nand-on-flash-bbt;
status = "okay";
 
kernel@0 {
label = "kernel";
reg = <0x0 0x400000>;
};
 
rootfs@400000 {
label = "rootfs";
reg = <0x400000 0x3C00000>;
};
 
user1@4000000 {
label = "user1";
reg = <0x4000000 0x2000000>;
};
 
user2@6000000 {
label = "user2";
reg = <0x6000000 0x2000000>;
};
};
 
usb0: ohci@500000 {
num-ports = <2>;
status = "okay";
};
};
};
/branches/gl-inet/target/linux/at91/files/arch/arm/boot/dts/wb45n.dts
@@ -0,0 +1,220 @@
/*
* wb45n.dts - Device Tree file for WB45NBT board
*
* Copyright (C) 2015 Laird
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "at91sam9g25.dtsi"
 
/ {
model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
 
chosen {
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
 
memory {
reg = <0x20000000 0x4000000>;
};
 
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
 
main_clock: clock@0 {
compatible = "atmel,osc", "fixed-clock";
clock-frequency = <12000000>;
};
 
slow_xtal {
clock-frequency = <32768>;
};
 
main_xtal {
clock-frequency = <12000000>;
};
};
 
ahb {
apb {
 
rstc@fffffe00 {
compatible = "atmel,sama5d3-rstc";
};
 
pinctrl@fffff400 {
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD5 gpio RDY/BUSY pin pull_up */
};
};
 
usb2 {
pinctrl_board_usb2: usb2-board {
atmel,pins =
<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB11 gpio vbus sense, deglitch */
};
};
};
 
dbgu: serial@fffff200 {
status = "okay";
};
 
usart0: serial@f801c000 {
status = "okay";
};
 
usart3: serial@f8028000 {
status = "okay";
};
 
spi0: spi@f0000000 {
status = "okay";
cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
};
 
mmc0: mmc@f0008000 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
 
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
};
 
usb2: gadget@f803c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_board_usb2>;
atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
 
i2c1: i2c@f8014000 {
status = "okay";
};
 
watchdog@fffffe40 {
status = "okay";
};
 
shdwc@fffffe10 {
atmel,wakeup-mode = "low";
};
 
rtc@fffffeb0 {
status = "okay";
};
};
 
usb0: ohci@00600000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <
&pioB 12 GPIO_ACTIVE_HIGH
&pioA 31 GPIO_ACTIVE_HIGH
>;
atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
};
 
usb1: ehci@00700000 {
status = "okay";
};
 
nand0: nand@40000000 {
nand-bus-width = <8>;
nand-ecc-mode = "hw";
atmel,has-pmecc; /* Enable PMECC */
atmel,pmecc-cap = <4>;
atmel,pmecc-sector-size = <512>;
nand-on-flash-bbt;
status = "okay";
 
at91bootstrap@0 {
label = "at91bs";
reg = <0x0 0x20000>;
};
 
uboot@20000 {
label = "u-boot";
reg = <0x20000 0x80000>;
};
 
ubootenv@a0000 {
label = "u-boot-env";
reg = <0xa0000 0x20000>;
};
 
ubootenv@c0000 {
label = "redund-env";
reg = <0xc0000 0x20000>;
};
 
kernel-a@e0000 {
label = "kernel-a";
reg = <0xe0000 0x280000>;
};
 
kernel-b@360000 {
label = "kernel-b";
reg = <0x360000 0x280000>;
};
 
rootfs-a@5e0000 {
label = "rootfs-a";
reg = <0x5e0000 0x2600000>;
};
 
rootfs-b@2be0000 {
label = "rootfs-b";
reg = <0x2be0000 0x2600000>;
};
 
user@51e0000 {
label = "user";
reg = <0x51e0000 0x2dc0000>;
};
 
logs@7fa0000 {
label = "logs";
reg = <0x7fa0000 0x60000>;
};
};
};
 
atheros {
compatible = "atheros,ath6kl";
atheros,board-id = "SD32";
};
 
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
irqbtn@pb18 {
label = "IRQBTN";
linux,code = <99>;
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
};
};
/branches/gl-inet/target/linux/at91/files/arch/arm/boot/dts/wb50n.dts
@@ -0,0 +1,117 @@
/*
* wb50n.dts - Device Tree file for wb50n board
*
* Copyright (C) 2015 Laird
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "wb50n.dtsi"
 
/ {
model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
compatible = "laird,wb50n", "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
 
chosen {
bootargs = "console=ttyS0,115200 earlyprintk loglevel=4 mem=64M";
};
 
ahb {
 
apb {
mmc0: mmc@f0000000 {
status = "okay";
};
 
macb1: ethernet@f802c000 {
status = "okay";
};
 
dbgu: serial@ffffee00 {
status = "okay";
};
 
/* On BB40 this port is labeled UART1 */
usart0: serial@f001c000 {
status = "okay";
};
 
/* On BB40 this port is labeled UART0 */
usart1: serial@f0020000 {
status = "okay";
};
 
i2c0: i2c@f0014000 {
status = "okay";
};
 
spi1: spi@f8008000 {
status = "okay";
 
spidev@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <8000000>;
};
};
 
watchdog@fffffe40 {
status = "okay";
};
};
 
usb0: gadget@00500000 {
status = "okay";
};
 
usb1: ohci@00600000 {
status = "okay";
};
 
usb2: ehci@00700000 {
status = "okay";
};
 
};
 
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
btn0@pa10 {
label = "BTNESC";
linux,code = <1>; /* ESC button */
gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
 
irqbtn@pe31 {
label = "IRQBTN";
linux,code = <99>; /* SysReq button */
gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
};
 
leds {
compatible = "gpio-leds";
 
led0 {
label = "wb50n:blue:led0";
gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
default-state = "off";
};
 
led1 {
label = "wb50n:green:led1";
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
default-state = "off";
};
 
led2 {
label = "wb50n:red:led2";
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
};
/branches/gl-inet/target/linux/at91/files/arch/arm/boot/dts/wb50n.dtsi
@@ -0,0 +1,205 @@
/*
* wb50n.dts - Device Tree file for wb50n board
*
* Copyright (C) 2015 Laird
*
* Licensed under GPLv2 or later.
*/
#include "sama5d31.dtsi"
 
/ {
model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
compatible = "laird,wb50n", "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
 
chosen {
bootargs = "console=ttyS0,115200 earlyprintk loglevel=4 mem=64M";
};
 
memory {
reg = <0x20000000 0x4000000>;
};
 
clocks {
slow_xtal {
clock-frequency = <32768>;
};
 
main_xtal {
clock-frequency = <12000000>;
};
};
 
ahb {
 
apb {
pmc: pmc@fffffc00 {
main: mainck {
clock-frequency = <12000000>;
};
 
periphck {
usart1_clk: usart1_clk {
#clock-cells = <0>;
reg = <13>;
atmel,clk-output-range = <0 132000000>;
};
};
};
 
pinctrl@fffff200 {
board {
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
<AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
};
 
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
};
};
};
 
mmc0: mmc@f0000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
 
mmc1: mmc@f8000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
 
macb1: ethernet@f802c000 {
phy-mode = "rmii";
};
 
 
dbgu: serial@ffffee00 {
dmas = <0>, <0>; /* Do not use DMA for dbgu */
};
 
/* On BB40 this port is labeled UART1 */
usart0: serial@f001c000 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
};
 
/* On BB40 this port is labeled UART0 */
usart1: serial@f0020000 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
dtr-gpios = <&pioD 13 GPIO_ACTIVE_LOW>;
dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
dcd-gpios = <&pioD 7 GPIO_ACTIVE_LOW>;
rng-gpios = <&pioD 8 GPIO_ACTIVE_LOW>;
};
 
/* USART3 is direct-connect to the Bluetooth UART on the radio SIP */
usart3: serial@f8024000 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
status = "okay";
};
 
spi1: spi@f8008000 {
cs-gpios = <&pioC 25 0>, <0>, <0>, <0>;
};
 
sckc@fffffe50 {
slow_osc: slow_osc {
atmel,osc-bypass;
};
};
};
 
nand0: nand@60000000 {
nand-bus-width = <8>;
nand-ecc-mode = "hw";
atmel,has-pmecc;
atmel,pmecc-cap = <8>;
atmel,pmecc-sector-size = <512>;
nand-on-flash-bbt;
status = "okay";
 
at91bootstrap@0 {
label = "at91bs";
reg = <0x0 0x20000>;
};
 
uboot@20000 {
label = "u-boot";
reg = <0x20000 0x80000>;
};
 
ubootenv@a0000 {
label = "u-boot-env";
reg = <0xa0000 0x20000>;
};
 
ubootenv@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x20000>;
};
 
kernel-a@e0000 {
label = "kernel-a";
reg = <0xe0000 0x500000>;
};
 
kernel-b@5e0000 {
label = "kernel-b";
reg = <0x5e0000 0x500000>;
};
 
rootfs-a@ae0000 {
label = "rootfs-a";
reg = <0xae0000 0x3000000>;
};
 
rootfs-b@3ae0000 {
label = "rootfs-b";
reg = <0x3ae0000 0x3000000>;
};
 
user@6ae0000 {
label = "user";
reg = <0x6ae0000 0x14e0000>;
};
 
};
 
usb0: gadget@00500000 {
atmel,vbus-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
};
 
usb1: ohci@00600000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 2 GPIO_ACTIVE_LOW>;
atmel,oc-gpio = <&pioA 4 GPIO_ACTIVE_LOW>;
};
};
 
atheros {
compatible = "atheros,ath6kl";
atheros,board-id = "SD32";
};
};