/branches/18.06.1/target/linux/generic/backport-4.9/062-v4.11-0004-mtd-spi-nor-rename-SPINOR_OP_-macros-of-the-4-byte-a.patch |
@@ -0,0 +1,187 @@ |
From 05aba5763dcf35eddc58aaf99c9f16d19730e0a8 Mon Sep 17 00:00:00 2001 |
From: Cyrille Pitchen <cyrille.pitchen@atmel.com> |
Date: Thu, 27 Oct 2016 11:55:39 +0200 |
Subject: [PATCH] mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address |
op codes |
|
This patch renames the SPINOR_OP_* macros of the 4-byte address |
instruction set so the new names all share a common pattern: the 4-byte |
address name is built from the 3-byte address name appending the "_4B" |
suffix. |
|
The patch also introduces new op codes to support other SPI protocols such |
as SPI 1-4-4 and SPI 1-2-2. |
|
This is a transitional patch and will help a later patch of spi-nor.c |
to automate the translation from the 3-byte address op codes into their |
4-byte address version. |
|
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> |
Acked-by: Mark Brown <broonie@kernel.org> |
Acked-by: Marek Vasut <marek.vasut@gmail.com> |
--- |
drivers/mtd/devices/serial_flash_cmds.h | 7 ------- |
drivers/mtd/devices/st_spi_fsm.c | 28 ++++++++++++++-------------- |
drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- |
drivers/spi/spi-bcm-qspi.c | 6 +++--- |
include/linux/mtd/spi-nor.h | 22 ++++++++++++++++------ |
5 files changed, 37 insertions(+), 34 deletions(-) |
|
--- a/drivers/mtd/devices/serial_flash_cmds.h |
+++ b/drivers/mtd/devices/serial_flash_cmds.h |
@@ -18,19 +18,12 @@ |
#define SPINOR_OP_RDVCR 0x85 |
|
/* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ |
-#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ |
-#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ |
- |
#define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ |
#define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */ |
#define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */ |
#define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ |
#define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ |
|
-/* READ commands with 32-bit addressing */ |
-#define SPINOR_OP_READ4_1_2_2 0xbc |
-#define SPINOR_OP_READ4_1_4_4 0xec |
- |
/* Configuration flags */ |
#define FLASH_FLAG_SINGLE 0x000000ff |
#define FLASH_FLAG_READ_WRITE 0x00000001 |
--- a/drivers/mtd/devices/st_spi_fsm.c |
+++ b/drivers/mtd/devices/st_spi_fsm.c |
@@ -507,13 +507,13 @@ static struct seq_rw_config n25q_read3_c |
* - 'FAST' variants configured for 8 dummy cycles (see note above.) |
*/ |
static struct seq_rw_config n25q_read4_configs[] = { |
- {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, |
- {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
+ {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, |
+ {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
}; |
|
/* |
@@ -553,13 +553,13 @@ static int stfsm_mx25_en_32bit_addr_seq( |
* entering a state that is incompatible with the SPIBoot Controller. |
*/ |
static struct seq_rw_config stfsm_s25fl_read4_configs[] = { |
- {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 2, 4}, |
- {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 4, 0}, |
- {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, |
- {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, |
- {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
+ {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 2, 4}, |
+ {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 4, 0}, |
+ {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, |
+ {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, |
+ {0x00, 0, 0, 0, 0, 0x00, 0, 0}, |
}; |
|
static struct seq_rw_config stfsm_s25fl_write4_configs[] = { |
--- a/drivers/mtd/spi-nor/spi-nor.c |
+++ b/drivers/mtd/spi-nor/spi-nor.c |
@@ -1632,16 +1632,16 @@ int spi_nor_scan(struct spi_nor *nor, co |
/* Dedicated 4-byte command set */ |
switch (nor->flash_read) { |
case SPI_NOR_QUAD: |
- nor->read_opcode = SPINOR_OP_READ4_1_1_4; |
+ nor->read_opcode = SPINOR_OP_READ_1_1_4_4B; |
break; |
case SPI_NOR_DUAL: |
- nor->read_opcode = SPINOR_OP_READ4_1_1_2; |
+ nor->read_opcode = SPINOR_OP_READ_1_1_2_4B; |
break; |
case SPI_NOR_FAST: |
- nor->read_opcode = SPINOR_OP_READ4_FAST; |
+ nor->read_opcode = SPINOR_OP_READ_FAST_4B; |
break; |
case SPI_NOR_NORMAL: |
- nor->read_opcode = SPINOR_OP_READ4; |
+ nor->read_opcode = SPINOR_OP_READ_4B; |
break; |
} |
nor->program_opcode = SPINOR_OP_PP_4B; |
--- a/drivers/spi/spi-bcm-qspi.c |
+++ b/drivers/spi/spi-bcm-qspi.c |
@@ -371,7 +371,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
/* default mode, does not need flex_cmd */ |
flex_mode = 0; |
else |
- command = SPINOR_OP_READ4_FAST; |
+ command = SPINOR_OP_READ_FAST_4B; |
break; |
case SPI_NBITS_DUAL: |
bpc = 0x00000001; |
@@ -384,7 +384,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
} else { |
command = SPINOR_OP_READ_1_1_2; |
if (spans_4byte) |
- command = SPINOR_OP_READ4_1_1_2; |
+ command = SPINOR_OP_READ_1_1_2_4B; |
} |
break; |
case SPI_NBITS_QUAD: |
@@ -399,7 +399,7 @@ static int bcm_qspi_bspi_set_flex_mode(s |
} else { |
command = SPINOR_OP_READ_1_1_4; |
if (spans_4byte) |
- command = SPINOR_OP_READ4_1_1_4; |
+ command = SPINOR_OP_READ_1_1_4_4B; |
} |
break; |
default: |
--- a/include/linux/mtd/spi-nor.h |
+++ b/include/linux/mtd/spi-nor.h |
@@ -43,9 +43,13 @@ |
#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ |
#define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ |
#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ |
-#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */ |
-#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */ |
+#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ |
+#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */ |
+#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */ |
+#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */ |
#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ |
+#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */ |
+#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */ |
#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ |
#define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ |
#define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ |
@@ -56,11 +60,17 @@ |
#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ |
|
/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ |
-#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */ |
-#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */ |
-#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */ |
-#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */ |
+#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ |
+#define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */ |
+#define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */ |
+#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */ |
+#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */ |
+#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */ |
#define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ |
+#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */ |
+#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */ |
+#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ |
+#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ |
#define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ |
|
/* Used for SST flashes only. */ |