/branches/18.06.1/target/linux/brcm63xx/patches-4.14/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch |
@@ -0,0 +1,436 @@ |
From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001 |
From: Jonas Gorski <jonas.gorski@gmail.com> |
Date: Fri, 24 Jun 2016 22:16:01 +0200 |
Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358 |
|
Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different |
functions onto the GPIO pins. It does not support configuring individual |
pins but only whole groups. These groups may overlap, and still require |
the directions to be set correctly in the GPIO register. In addition the |
functions register controls other, not directly mux related functions. |
|
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> |
--- |
drivers/pinctrl/bcm63xx/Kconfig | 8 + |
drivers/pinctrl/bcm63xx/Makefile | 1 + |
drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++ |
3 files changed, 402 insertions(+) |
create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c |
|
--- a/drivers/pinctrl/bcm63xx/Kconfig |
+++ b/drivers/pinctrl/bcm63xx/Kconfig |
@@ -15,3 +15,11 @@ config PINCTRL_BCM6348 |
select PINCONF |
select PINCTRL_BCM63XX |
select GENERIC_PINCONF |
+ |
+config PINCTRL_BCM6358 |
+ bool "BCM6358 pincontrol driver" if COMPILE_TEST |
+ select PINMUX |
+ select PINCONF |
+ select PINCTRL_BCM63XX |
+ select GENERIC_PINCONF |
+ select MFD_SYSCON |
--- a/drivers/pinctrl/bcm63xx/Makefile |
+++ b/drivers/pinctrl/bcm63xx/Makefile |
@@ -1,3 +1,4 @@ |
obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o |
obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o |
obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o |
+obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o |
--- /dev/null |
+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c |
@@ -0,0 +1,393 @@ |
+/* |
+ * This file is subject to the terms and conditions of the GNU General Public |
+ * License. See the file "COPYING" in the main directory of this archive |
+ * for more details. |
+ * |
+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com> |
+ */ |
+ |
+#include <linux/kernel.h> |
+#include <linux/bitops.h> |
+#include <linux/gpio.h> |
+#include <linux/gpio/driver.h> |
+#include <linux/mfd/syscon.h> |
+#include <linux/of.h> |
+#include <linux/of_gpio.h> |
+#include <linux/of_address.h> |
+#include <linux/slab.h> |
+#include <linux/regmap.h> |
+#include <linux/platform_device.h> |
+ |
+#include <linux/pinctrl/pinconf.h> |
+#include <linux/pinctrl/pinconf-generic.h> |
+#include <linux/pinctrl/pinmux.h> |
+#include <linux/pinctrl/machine.h> |
+ |
+#include "../core.h" |
+#include "../pinctrl-utils.h" |
+ |
+#include "pinctrl-bcm63xx.h" |
+ |
+/* GPIO_MODE register */ |
+#define BCM6358_MODE_MUX_NONE 0 |
+ |
+/* overlays on gpio pins */ |
+#define BCM6358_MODE_MUX_EBI_CS BIT(5) |
+#define BCM6358_MODE_MUX_UART1 BIT(6) |
+#define BCM6358_MODE_MUX_SPI_CS BIT(7) |
+#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8) |
+#define BCM6358_MODE_MUX_LEGACY_LED BIT(9) |
+#define BCM6358_MODE_MUX_SERIAL_LED BIT(10) |
+#define BCM6358_MODE_MUX_LED BIT(11) |
+#define BCM6358_MODE_MUX_UTOPIA BIT(12) |
+#define BCM6358_MODE_MUX_CLKRST BIT(13) |
+#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14) |
+#define BCM6358_MODE_MUX_SYS_IRQ BIT(15) |
+ |
+#define BCM6358_NGPIO 40 |
+ |
+struct bcm6358_pingroup { |
+ const char *name; |
+ const unsigned * const pins; |
+ const unsigned num_pins; |
+ |
+ const u16 mode_val; |
+ |
+ /* non-GPIO function muxes require the gpio direction to be set */ |
+ const u16 direction; |
+}; |
+ |
+struct bcm6358_function { |
+ const char *name; |
+ const char * const *groups; |
+ const unsigned num_groups; |
+}; |
+ |
+struct bcm6358_pinctrl { |
+ struct device *dev; |
+ struct pinctrl_dev *pctldev; |
+ struct pinctrl_desc desc; |
+ |
+ struct regmap_field *overlays; |
+ |
+ struct gpio_chip gpio[2]; |
+}; |
+ |
+#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \ |
+ { \ |
+ .number = a, \ |
+ .name = b, \ |
+ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \ |
+ BCM6358_MODE_MUX_##bit2 | \ |
+ BCM6358_MODE_MUX_##bit3), \ |
+ } |
+ |
+static const struct pinctrl_pin_desc bcm6358_pins[] = { |
+ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE), |
+ PINCTRL_PIN(4, "gpio4"), |
+ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE), |
+ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE), |
+ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE), |
+ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA), |
+ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA), |
+ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA), |
+ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA), |
+ PINCTRL_PIN(16, "gpio16"), |
+ PINCTRL_PIN(17, "gpio17"), |
+ PINCTRL_PIN(18, "gpio18"), |
+ PINCTRL_PIN(19, "gpio19"), |
+ PINCTRL_PIN(20, "gpio20"), |
+ PINCTRL_PIN(21, "gpio21"), |
+ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE), |
+ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE), |
+ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE), |
+ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS), |
+ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS), |
+ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE), |
+ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE), |
+ PINCTRL_PIN(34, "gpio34"), |
+ PINCTRL_PIN(35, "gpio35"), |
+ PINCTRL_PIN(36, "gpio36"), |
+ PINCTRL_PIN(37, "gpio37"), |
+ PINCTRL_PIN(38, "gpio38"), |
+ PINCTRL_PIN(39, "gpio39"), |
+}; |
+ |
+static unsigned ebi_cs_grp_pins[] = { 30, 31 }; |
+ |
+static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 }; |
+ |
+static unsigned spi_cs_grp_pins[] = { 32, 33 }; |
+ |
+static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 }; |
+ |
+static unsigned serial_led_grp_pins[] = { 6, 7 }; |
+ |
+static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 }; |
+ |
+static unsigned led_grp_pins[] = { 0, 1, 2, 3 }; |
+ |
+static unsigned utopia_grp_pins[] = { |
+ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, |
+}; |
+ |
+static unsigned pwm_syn_clk_grp_pins[] = { 8 }; |
+ |
+static unsigned sys_irq_grp_pins[] = { 5 }; |
+ |
+#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \ |
+ { \ |
+ .name = #n, \ |
+ .pins = n##_pins, \ |
+ .num_pins = ARRAY_SIZE(n##_pins), \ |
+ .mode_val = BCM6358_MODE_MUX_##bit, \ |
+ .direction = dir, \ |
+ } |
+ |
+static const struct bcm6358_pingroup bcm6358_groups[] = { |
+ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3), |
+ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2), |
+ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6), |
+ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6), |
+ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f), |
+ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3), |
+ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf), |
+ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f), |
+ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1), |
+ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1), |
+}; |
+ |
+static const char * const ebi_cs_groups[] = { |
+ "ebi_cs_grp" |
+}; |
+ |
+static const char * const uart1_groups[] = { |
+ "uart1_grp" |
+}; |
+ |
+static const char * const spi_cs_2_3_groups[] = { |
+ "spi_cs_2_3_grp" |
+}; |
+ |
+static const char * const async_modem_groups[] = { |
+ "async_modem_grp" |
+}; |
+ |
+static const char * const legacy_led_groups[] = { |
+ "legacy_led_grp", |
+}; |
+ |
+static const char * const serial_led_groups[] = { |
+ "serial_led_grp", |
+}; |
+ |
+static const char * const led_groups[] = { |
+ "led_grp", |
+}; |
+ |
+static const char * const clkrst_groups[] = { |
+ "clkrst_grp", |
+}; |
+ |
+static const char * const pwm_syn_clk_groups[] = { |
+ "pwm_syn_clk_grp", |
+}; |
+ |
+static const char * const sys_irq_groups[] = { |
+ "sys_irq_grp", |
+}; |
+ |
+#define BCM6358_FUN(n) \ |
+ { \ |
+ .name = #n, \ |
+ .groups = n##_groups, \ |
+ .num_groups = ARRAY_SIZE(n##_groups), \ |
+ } |
+ |
+static const struct bcm6358_function bcm6358_funcs[] = { |
+ BCM6358_FUN(ebi_cs), |
+ BCM6358_FUN(uart1), |
+ BCM6358_FUN(spi_cs_2_3), |
+ BCM6358_FUN(async_modem), |
+ BCM6358_FUN(legacy_led), |
+ BCM6358_FUN(serial_led), |
+ BCM6358_FUN(led), |
+ BCM6358_FUN(clkrst), |
+ BCM6358_FUN(pwm_syn_clk), |
+ BCM6358_FUN(sys_irq), |
+}; |
+ |
+static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev) |
+{ |
+ return ARRAY_SIZE(bcm6358_groups); |
+} |
+ |
+static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev, |
+ unsigned group) |
+{ |
+ return bcm6358_groups[group].name; |
+} |
+ |
+static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, |
+ unsigned group, const unsigned **pins, |
+ unsigned *num_pins) |
+{ |
+ *pins = bcm6358_groups[group].pins; |
+ *num_pins = bcm6358_groups[group].num_pins; |
+ |
+ return 0; |
+} |
+ |
+static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev) |
+{ |
+ return ARRAY_SIZE(bcm6358_funcs); |
+} |
+ |
+static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev, |
+ unsigned selector) |
+{ |
+ return bcm6358_funcs[selector].name; |
+} |
+ |
+static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev, |
+ unsigned selector, |
+ const char * const **groups, |
+ unsigned * const num_groups) |
+{ |
+ *groups = bcm6358_funcs[selector].groups; |
+ *num_groups = bcm6358_funcs[selector].num_groups; |
+ |
+ return 0; |
+} |
+ |
+static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev, |
+ unsigned selector, unsigned group) |
+{ |
+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
+ const struct bcm6358_pingroup *grp = &bcm6358_groups[group]; |
+ u32 val = grp->mode_val; |
+ u32 mask = val; |
+ unsigned pin; |
+ |
+ for (pin = 0; pin < grp->num_pins; pin++) |
+ mask |= (unsigned long)bcm6358_pins[pin].drv_data; |
+ |
+ regmap_field_update_bits(pctl->overlays, mask, val); |
+ |
+ for (pin = 0; pin < grp->num_pins; pin++) { |
+ int hw_gpio = bcm6358_pins[pin].number; |
+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32]; |
+ |
+ if (grp->direction & BIT(pin)) |
+ gc->direction_output(gc, hw_gpio % 32, 0); |
+ else |
+ gc->direction_input(gc, hw_gpio % 32); |
+ } |
+ |
+ return 0; |
+} |
+ |
+static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev, |
+ struct pinctrl_gpio_range *range, |
+ unsigned offset) |
+{ |
+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); |
+ u32 mask; |
+ |
+ mask = (unsigned long)bcm6358_pins[offset].drv_data; |
+ if (!mask) |
+ return 0; |
+ |
+ /* disable all functions using this pin */ |
+ return regmap_field_update_bits(pctl->overlays, mask, 0); |
+} |
+ |
+static struct pinctrl_ops bcm6358_pctl_ops = { |
+ .get_groups_count = bcm6358_pinctrl_get_group_count, |
+ .get_group_name = bcm6358_pinctrl_get_group_name, |
+ .get_group_pins = bcm6358_pinctrl_get_group_pins, |
+#ifdef CONFIG_OF |
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, |
+ .dt_free_map = pinctrl_utils_free_map, |
+#endif |
+}; |
+ |
+static struct pinmux_ops bcm6358_pmx_ops = { |
+ .get_functions_count = bcm6358_pinctrl_get_func_count, |
+ .get_function_name = bcm6358_pinctrl_get_func_name, |
+ .get_function_groups = bcm6358_pinctrl_get_groups, |
+ .set_mux = bcm6358_pinctrl_set_mux, |
+ .gpio_request_enable = bcm6358_gpio_request_enable, |
+ .strict = true, |
+}; |
+ |
+static int bcm6358_pinctrl_probe(struct platform_device *pdev) |
+{ |
+ struct bcm6358_pinctrl *pctl; |
+ struct regmap *mode; |
+ struct reg_field overlays = REG_FIELD(0, 0, 15); |
+ |
+ if (pdev->dev.of_node) |
+ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, |
+ "brcm,gpiomode"); |
+ else |
+ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098"); |
+ |
+ if (IS_ERR(mode)) |
+ return PTR_ERR(mode); |
+ |
+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); |
+ if (!pctl) |
+ return -ENOMEM; |
+ |
+ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays); |
+ if (IS_ERR(pctl->overlays)) |
+ return PTR_ERR(pctl->overlays); |
+ |
+ /* disable all muxes by default */ |
+ regmap_field_write(pctl->overlays, 0); |
+ |
+ pctl->desc.name = dev_name(&pdev->dev); |
+ pctl->desc.owner = THIS_MODULE; |
+ pctl->desc.pctlops = &bcm6358_pctl_ops; |
+ pctl->desc.pmxops = &bcm6358_pmx_ops; |
+ |
+ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins); |
+ pctl->desc.pins = bcm6358_pins; |
+ |
+ platform_set_drvdata(pdev, pctl); |
+ |
+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, |
+ pctl->gpio, BCM6358_NGPIO); |
+ if (IS_ERR(pctl->pctldev)) |
+ return PTR_ERR(pctl->pctldev); |
+ |
+ return 0; |
+} |
+ |
+static const struct of_device_id bcm6358_pinctrl_match[] = { |
+ { .compatible = "brcm,bcm6358-pinctrl", }, |
+ { }, |
+}; |
+ |
+static struct platform_driver bcm6358_pinctrl_driver = { |
+ .probe = bcm6358_pinctrl_probe, |
+ .driver = { |
+ .name = "bcm6358-pinctrl", |
+ .of_match_table = bcm6358_pinctrl_match, |
+ }, |
+}; |
+ |
+builtin_platform_driver(bcm6358_pinctrl_driver); |