/branches/18.06.1/target/linux/brcm63xx/patches-4.14/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch |
@@ -0,0 +1,210 @@ |
From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001 |
From: Jonas Gorski <jonas.gorski@gmail.com> |
Date: Sun, 16 Jul 2017 12:23:47 +0200 |
Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support |
|
Enable clkdev lookup support to allow us providing clocks under |
different names to devices more easily, so we don't need to care |
about clock name clashes anymore. |
|
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> |
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> |
--- |
arch/mips/Kconfig | 1 + |
arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++----------- |
2 files changed, 116 insertions(+), 35 deletions(-) |
|
--- a/arch/mips/Kconfig |
+++ b/arch/mips/Kconfig |
@@ -279,6 +279,7 @@ config BCM63XX |
select GPIOLIB |
select HAVE_CLK |
select MIPS_L1_CACHE_SHIFT_4 |
+ select CLKDEV_LOOKUP |
help |
Support for BCM63XX based boards |
|
--- a/arch/mips/bcm63xx/clk.c |
+++ b/arch/mips/bcm63xx/clk.c |
@@ -11,6 +11,7 @@ |
#include <linux/mutex.h> |
#include <linux/err.h> |
#include <linux/clk.h> |
+#include <linux/clkdev.h> |
#include <linux/delay.h> |
#include <bcm63xx_cpu.h> |
#include <bcm63xx_io.h> |
@@ -359,44 +360,103 @@ long clk_round_rate(struct clk *clk, uns |
} |
EXPORT_SYMBOL_GPL(clk_round_rate); |
|
-struct clk *clk_get(struct device *dev, const char *id) |
-{ |
- if (!strcmp(id, "enet0")) |
- return &clk_enet0; |
- if (!strcmp(id, "enet1")) |
- return &clk_enet1; |
- if (!strcmp(id, "enetsw")) |
- return &clk_enetsw; |
- if (!strcmp(id, "ephy")) |
- return &clk_ephy; |
- if (!strcmp(id, "usbh")) |
- return &clk_usbh; |
- if (!strcmp(id, "usbd")) |
- return &clk_usbd; |
- if (!strcmp(id, "spi")) |
- return &clk_spi; |
- if (!strcmp(id, "hsspi")) |
- return &clk_hsspi; |
- if (!strcmp(id, "xtm")) |
- return &clk_xtm; |
- if (!strcmp(id, "periph")) |
- return &clk_periph; |
- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) |
- return &clk_pcm; |
- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) |
- return &clk_ipsec; |
- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) |
- return &clk_pcie; |
- return ERR_PTR(-ENOENT); |
-} |
- |
-EXPORT_SYMBOL(clk_get); |
- |
-void clk_put(struct clk *clk) |
-{ |
-} |
- |
-EXPORT_SYMBOL(clk_put); |
+static struct clk_lookup bcm3368_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0), |
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1), |
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm), |
+}; |
+ |
+static struct clk_lookup bcm6328_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), |
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie), |
+}; |
+ |
+static struct clk_lookup bcm6338_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0), |
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1), |
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+}; |
+ |
+static struct clk_lookup bcm6345_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0), |
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1), |
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+}; |
+ |
+static struct clk_lookup bcm6348_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0), |
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1), |
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+}; |
+ |
+static struct clk_lookup bcm6358_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0), |
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1), |
+ CLKDEV_INIT(NULL, "ephy", &clk_ephy), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm), |
+}; |
+ |
+static struct clk_lookup bcm6362_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), |
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie), |
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), |
+}; |
+ |
+static struct clk_lookup bcm6368_clks[] = { |
+ /* fixed rate clocks */ |
+ CLKDEV_INIT(NULL, "periph", &clk_periph), |
+ /* gated clocks */ |
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), |
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh), |
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd), |
+ CLKDEV_INIT(NULL, "spi", &clk_spi), |
+ CLKDEV_INIT(NULL, "xtm", &clk_xtm), |
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), |
+}; |
|
#define HSSPI_PLL_HZ_6328 133333333 |
#define HSSPI_PLL_HZ_6362 400000000 |
@@ -404,11 +464,31 @@ EXPORT_SYMBOL(clk_put); |
static int __init bcm63xx_clk_init(void) |
{ |
switch (bcm63xx_get_cpu_id()) { |
+ case BCM3368_CPU_ID: |
+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); |
+ break; |
case BCM6328_CPU_ID: |
clk_hsspi.rate = HSSPI_PLL_HZ_6328; |
+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); |
+ break; |
+ case BCM6338_CPU_ID: |
+ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks)); |
+ break; |
+ case BCM6345_CPU_ID: |
+ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks)); |
+ break; |
+ case BCM6348_CPU_ID: |
+ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks)); |
+ break; |
+ case BCM6358_CPU_ID: |
+ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); |
break; |
case BCM6362_CPU_ID: |
clk_hsspi.rate = HSSPI_PLL_HZ_6362; |
+ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); |
+ break; |
+ case BCM6368_CPU_ID: |
+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); |
break; |
} |
|