OpenWrt – Blame information for rev 1
?pathlinks?
Rev | Author | Line No. | Line |
---|---|---|---|
1 | office | 1 | From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001 |
2 | From: Corentin Labbe <clabbe.montjoie@gmail.com> |
||
3 | Date: Tue, 31 Oct 2017 09:19:11 +0100 |
||
4 | Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by |
||
5 | sun8i-h3-emac |
||
6 | |||
7 | Since dwmac-sun8i could use either an integrated PHY or an external PHY |
||
8 | (which could be at same MDIO address), we need to represent this selection |
||
9 | by a MDIO switch. |
||
10 | |||
11 | Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> |
||
12 | Acked-by: Florian Fainelli <f.fainelli@gmail.com> |
||
13 | Reviewed-by: Andrew Lunn <andrew@lunn.ch> |
||
14 | Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
||
15 | --- |
||
16 | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++---- |
||
17 | 1 file changed, 27 insertions(+), 4 deletions(-) |
||
18 | |||
19 | --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi |
||
20 | +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi |
||
21 | @@ -408,11 +408,34 @@ |
||
22 | mdio: mdio { |
||
23 | #address-cells = <1>; |
||
24 | #size-cells = <0>; |
||
25 | - int_mii_phy: ethernet-phy@1 { |
||
26 | - compatible = "ethernet-phy-ieee802.3-c22"; |
||
27 | + compatible = "snps,dwmac-mdio"; |
||
28 | + }; |
||
29 | + |
||
30 | + mdio-mux { |
||
31 | + compatible = "allwinner,sun8i-h3-mdio-mux"; |
||
32 | + #address-cells = <1>; |
||
33 | + #size-cells = <0>; |
||
34 | + |
||
35 | + mdio-parent-bus = <&mdio>; |
||
36 | + /* Only one MDIO is usable at the time */ |
||
37 | + internal_mdio: mdio@1 { |
||
38 | + compatible = "allwinner,sun8i-h3-mdio-internal"; |
||
39 | reg = <1>; |
||
40 | - clocks = <&ccu CLK_BUS_EPHY>; |
||
41 | - resets = <&ccu RST_BUS_EPHY>; |
||
42 | + #address-cells = <1>; |
||
43 | + #size-cells = <0>; |
||
44 | + |
||
45 | + int_mii_phy: ethernet-phy@1 { |
||
46 | + compatible = "ethernet-phy-ieee802.3-c22"; |
||
47 | + reg = <1>; |
||
48 | + clocks = <&ccu CLK_BUS_EPHY>; |
||
49 | + resets = <&ccu RST_BUS_EPHY>; |
||
50 | + }; |
||
51 | + }; |
||
52 | + |
||
53 | + external_mdio: mdio@2 { |
||
54 | + reg = <2>; |
||
55 | + #address-cells = <1>; |
||
56 | + #size-cells = <0>; |
||
57 | }; |
||
58 | }; |
||
59 | }; |